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From: Anup Patel <Anup.Patel@wdc.com>
To: Palmer Dabbelt <palmer@sifive.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Paolo Bonzini <pbonzini@redhat.com>, Radim K <rkrcmar@redhat.com>
Cc: Damien Le Moal <Damien.LeMoal@wdc.com>,
	Anup Patel <Anup.Patel@wdc.com>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	Anup Patel <anup@brainfault.org>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Christoph Hellwig <hch@infradead.org>,
	Atish Patra <Atish.Patra@wdc.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>
Subject: [PATCH v4 01/20] KVM: RISC-V: Add KVM_REG_RISCV for ONE_REG interface
Date: Wed, 7 Aug 2019 12:28:03 +0000	[thread overview]
Message-ID: <20190807122726.81544-2-anup.patel@wdc.com> (raw)
In-Reply-To: <20190807122726.81544-1-anup.patel@wdc.com>

We will be using ONE_REG interface accessing VCPU registers from
user-space hence we add KVM_REG_RISCV for RISC-V VCPU registers.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/uapi/linux/kvm.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
index 5e3f12d5359e..fcaea3c2fc7e 100644
--- a/include/uapi/linux/kvm.h
+++ b/include/uapi/linux/kvm.h
@@ -1142,6 +1142,7 @@ struct kvm_dirty_tlb {
 #define KVM_REG_S390		0x5000000000000000ULL
 #define KVM_REG_ARM64		0x6000000000000000ULL
 #define KVM_REG_MIPS		0x7000000000000000ULL
+#define KVM_REG_RISCV		0x8000000000000000ULL
 
 #define KVM_REG_SIZE_SHIFT	52
 #define KVM_REG_SIZE_MASK	0x00f0000000000000ULL
-- 
2.17.1


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  reply	other threads:[~2019-08-07 12:28 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-07 12:27 [PATCH v4 00/20] KVM RISC-V Support Anup Patel
2019-08-07 12:28 ` Anup Patel [this message]
2019-08-07 12:28 ` [PATCH v4 02/20] RISC-V: Add bitmap reprensenting ISA features common across CPUs Anup Patel
2019-08-07 18:47   ` Atish Patra
2019-08-08  4:03     ` Anup Patel
2019-08-07 12:28 ` [PATCH v4 03/20] RISC-V: Export few kernel symbols Anup Patel
2019-08-07 12:28 ` [PATCH v4 04/20] RISC-V: Add hypervisor extension related CSR defines Anup Patel
2019-08-07 12:28 ` [PATCH v4 05/20] RISC-V: Add initial skeletal KVM support Anup Patel
2019-08-07 12:28 ` [PATCH v4 06/20] RISC-V: KVM: Implement VCPU create, init and destroy functions Anup Patel
2019-08-07 12:28 ` [PATCH v4 07/20] RISC-V: KVM: Implement VCPU interrupts and requests handling Anup Patel
2019-08-07 12:28 ` [PATCH v4 08/20] RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls Anup Patel
2019-08-07 12:28 ` [PATCH v4 09/20] RISC-V: KVM: Implement VCPU world-switch Anup Patel
2019-08-07 12:28 ` [PATCH v4 10/20] RISC-V: KVM: Handle MMIO exits for VCPU Anup Patel
2019-08-07 12:29 ` [PATCH v4 11/20] RISC-V: KVM: Handle WFI " Anup Patel
2019-08-07 12:29 ` [PATCH v4 12/20] RISC-V: KVM: Implement VMID allocator Anup Patel
2019-08-07 12:29 ` [PATCH v4 13/20] RISC-V: KVM: Implement stage2 page table programming Anup Patel
2019-08-07 12:29 ` [PATCH v4 14/20] RISC-V: KVM: Implement MMU notifiers Anup Patel
2019-08-07 12:29 ` [PATCH v4 15/20] RISC-V: KVM: Add timer functionality Anup Patel
2019-08-07 12:29 ` [PATCH v4 16/20] RISC-V: KVM: FP lazy save/restore Anup Patel
2019-08-07 12:29 ` [PATCH v4 17/20] RISC-V: KVM: Implement ONE REG interface for FP registers Anup Patel
2019-08-07 12:29 ` [PATCH v4 18/20] RISC-V: KVM: Add SBI v0.1 support Anup Patel
2019-08-07 12:29 ` [PATCH v4 19/20] RISC-V: Enable VIRTIO drivers in RV64 and RV32 defconfig Anup Patel
2019-08-07 12:29 ` [PATCH v4 20/20] RISC-V: KVM: Add MAINTAINERS entry Anup Patel
2019-08-07 20:09 ` [PATCH v4 00/20] KVM RISC-V Support Paolo Bonzini
2019-08-07 23:15   ` Paul Walmsley
2019-08-08  8:54     ` Paolo Bonzini
2019-08-09  1:35       ` Paul Walmsley
2019-08-09  7:37         ` Paolo Bonzini
2019-08-09  8:22           ` Anup Patel
2019-08-09  9:00             ` Paolo Bonzini
2019-08-09  9:26               ` Anup Patel

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