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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id t82sm4319977oie.12.2019.09.30.07.32.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Sep 2019 07:32:47 -0700 (PDT) Date: Mon, 30 Sep 2019 09:32:46 -0500 From: Rob Herring To: Claudiu.Beznea@microchip.com Subject: Re: [PATCH 4/7] dt-bindings: chosen: Add clocksource and clockevent selection Message-ID: <20190930143246.GA19967@bogus> References: <1568123236-767-1-git-send-email-claudiu.beznea@microchip.com> <1568123236-767-5-git-send-email-claudiu.beznea@microchip.com> <20190910143231.GB14966@e107533-lin.cambridge.arm.com> <20190910150826.GA18308@e107533-lin.cambridge.arm.com> <20190910151055.GX21254@piout.net> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190930_073248_964476_4CD284B7 X-CRM114-Status: GOOD ( 15.87 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tmaimon77@gmail.com, linus.walleij@linaro.org, nsekhar@ti.com, guoren@kernel.org, linux-stm32@st-md-mailman.stormreply.com, heiko@sntech.de, linux-samsung-soc@vger.kernel.org, linux-rockchip@lists.infradead.org, khilman@baylibre.com, Ludovic.Desroches@microchip.com, linux-imx@nxp.com, u.kleine-koenig@pengutronix.de, uclinux-h8-devel@lists.sourceforge.jp, marc.zyngier@arm.com, s.hauer@pengutronix.de, linux-unisoc@lists.infradead.org, khalasa@piap.pl, tglx@linutronix.de, sbranden@broadcom.com, linux-kernel@vger.kernel.org, ralf@linux-mips.org, paul.burton@mips.com, kernel@pengutronix.de, mark.rutland@arm.com, alexandre.belloni@bootlin.com, jhogan@kernel.org, palmer@sifive.com, eric@anholt.net, thierry.reding@gmail.com, manivannan.sadhasivam@linaro.org, ysato@users.sourceforge.jp, zhang.lyra@gmail.com, daniel.lezcano@linaro.org, jonathanh@nvidia.com, bgolaszewski@baylibre.com, kgene@kernel.org, alexandre.torgue@st.com, linux-arm-msm@vger.kernel.org, sudeep.holla@arm.com, lorenzo.pieralisi@arm.com, john.stultz@linaro.org, linux-rpi-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, baohua@kernel.org, kaloz@openwrt.org, sboyd@kernel.org, patrice.chotard@st.com, wahrenst@gmx.net, mcoquelin.stm32@gmail.com, narmstrong@baylibre.com, linux-tegra@vger.kernel.org, festevam@gmail.com, f.fainelli@gmail.com, benjaminfair@google.com, shc_work@mail.ru, krzk@kernel.org, yuenn@google.com, wens@csie.org, bcm-kernel-feedback-list@broadcom.com, orsonzhai@gmail.com, linux-snps-arc@lists.infradead.org, rjui@broadcom.com, vz@mleia.com, john@phrozen.org, tali.perry1@gmail.com, avifishman70@gmail.com, venture@google.com, lftan@altera.com, linux-oxnas@groups.io, shawnguo@kernel.org, afaerber@suse.de, baruch@tkos.co.il, maxime.ripard@bootlin.com, liviu.dudau@arm.com, linux-mips@vger.kernel.org, linux-riscv@lists.infradead.org, openbmc@lists.ozlabs.org, linux@armlinux.org.uk, agross@kernel.org, slemieux.tyco@gmail.com, devicetree@vger.kernel.org, aou@eecs.berkeley.edu, linux-mediatek@lists.infradead.org, ssantosh@kernel.org, matthias.bgg@gmail.com, monstr@monstr.eu, baolin.wang@linaro.org, vgupta@synopsys.com, Nicolas.Ferre@microchip.com, linux@prisktech.co.nz, nios2-dev@lists.rocketboards.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org On Wed, Sep 11, 2019 at 07:18:07AM +0000, Claudiu.Beznea@microchip.com wrote: > > > On 11.09.2019 03:03, Linus Walleij wrote: > > External E-Mail > > > > > > On Tue, Sep 10, 2019 at 4:11 PM Alexandre Belloni > > wrote: > >> On 10/09/2019 16:08:26+0100, Sudeep Holla wrote: > >>> On Tue, Sep 10, 2019 at 02:51:50PM +0000, Claudiu.Beznea@microchip.com wrote: > > > >>> In that case, why can't we identify capability that with the compatibles > >>> for this timer IP ? > >>> > >>> IOW, I don't like the proposal as it's hardware limitation. > >> > >> To be clear, bot timers are exactly the same but can't be clocksource > >> and clockevent at the same time. Why would we have different compatibles > >> for the exact same IP? > > > > In that case why not just pick the first one you find as clocksource > > and the second one as clock event? As they all come to the > > same timer of init function two simple local state variables can > > solve that: > > > > static bool registered_clocksource; > > static bool registered_clockevent; > > > > probe(timer) { > > if (!registered_clocksource) { > > register_clocksource(timer); > > registrered_clocksource = true; > > return; > > } > > if (!registered_clockevent) { > > register_clockevent(timer); > > registered_clockevent = true; > > return; > > } > > pr_info("surplus timer %p\n", timer); > > } > > > > That was also my proposal for the driver I'm sending this series for (see > [1]) but it has been proposed to implement a mechanism similar to this one > in this series (see [2] and [3]). This comes up over and over, and the answer is still no. Either each block is identical and doesn't matter which one is used for what or there is some h/w difference that you should describe. If you want something that would even be considered to put into DT, then define something BSD or other OS's could use too. (That's not a suggestion to respin this with generalized names.) Rob _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv