From: Atish Patra <atish.patra@wdc.com>
To: linux-kernel@vger.kernel.org
Cc: Marc Zyngier <maz@kernel.org>, Albert Ou <aou@eecs.berkeley.edu>,
Jason Cooper <jason@lakedaemon.net>,
Nick Hu <nickhu@andestech.com>,
Vincent Chen <vincent.chen@sifive.com>,
Anup Patel <anup@brainfault.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Heiko Carstens <heiko.carstens@de.ibm.com>,
Mike Rapoport <rppt@linux.ibm.com>,
"Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
Atish Patra <atish.patra@wdc.com>,
Geert Uytterhoeven <geert@linux-m68k.org>,
"Eric W. Biederman" <ebiederm@xmission.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org, Borislav Petkov <bp@suse.de>,
Thomas Gleixner <tglx@linutronix.de>, Mao Han <han_mao@c-sky.com>,
Kees Cook <keescook@chromium.org>
Subject: [PATCH v9 09/12] RISC-V: Add SBI HSM extension definitions
Date: Thu, 20 Feb 2020 16:44:10 -0800 [thread overview]
Message-ID: <20200221004413.12869-10-atish.patra@wdc.com> (raw)
In-Reply-To: <20200221004413.12869-1-atish.patra@wdc.com>
SBI specification defines HSM extension that allows to start/stop a hart
by a supervisor anytime. The specification is available at
https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc
Add those definitions here.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
arch/riscv/include/asm/sbi.h | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index abbf0a7d3b6e..0981a0c97eda 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -26,6 +26,7 @@ enum sbi_ext_id {
SBI_EXT_TIME = 0x54494D45,
SBI_EXT_IPI = 0x735049,
SBI_EXT_RFENCE = 0x52464E43,
+ SBI_EXT_HSM = 0x48534D,
};
enum sbi_ext_base_fid {
@@ -56,6 +57,19 @@ enum sbi_ext_rfence_fid {
SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID,
};
+enum sbi_ext_hsm_fid {
+ SBI_EXT_HSM_HART_START = 0,
+ SBI_EXT_HSM_HART_STOP,
+ SBI_EXT_HSM_HART_STATUS,
+};
+
+enum sbi_hsm_hart_status {
+ SBI_HSM_HART_STATUS_AVAILABLE = 0,
+ SBI_HSM_HART_STATUS_NOT_AVAILABLE,
+ SBI_HSM_HART_STATUS_START_PENDING,
+ SBI_HSM_HART_STATUS_STOP_PENDING,
+};
+
#define SBI_SPEC_VERSION_DEFAULT 0x1
#define SBI_SPEC_VERSION_MAJOR_SHIFT 24
#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
--
2.25.0
next prev parent reply other threads:[~2020-02-21 0:45 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-21 0:44 [PATCH v9 00/12] Add support for SBI v0.2 and CPU hotplug Atish Patra
2020-02-21 0:44 ` [PATCH v9 01/12] RISC-V: Mark existing SBI as 0.1 SBI Atish Patra
2020-02-21 0:44 ` [PATCH v9 02/12] RISC-V: Add basic support for SBI v0.2 Atish Patra
2020-03-09 10:33 ` Bin Meng
2020-03-10 6:21 ` Atish Patra
2020-02-21 0:44 ` [PATCH v9 03/12] RISC-V: Add SBI v0.2 extension definitions Atish Patra
2020-02-21 0:44 ` [PATCH v9 04/12] RISC-V: Introduce a new config for SBI v0.1 Atish Patra
2020-02-21 0:44 ` [PATCH v9 05/12] RISC-V: Implement new SBI v0.2 extensions Atish Patra
2020-02-21 0:44 ` [PATCH v9 06/12] RISC-V: Move relocate and few other functions out of __init Atish Patra
2020-02-21 0:44 ` [PATCH v9 07/12] RISC-V: Add cpu_ops and modify default booting method Atish Patra
2020-02-21 0:44 ` [PATCH v9 08/12] RISC-V: Export SBI error to linux error mapping function Atish Patra
2020-02-21 6:01 ` Anup Patel
2020-02-21 0:44 ` Atish Patra [this message]
2020-02-21 6:03 ` [PATCH v9 09/12] RISC-V: Add SBI HSM extension definitions Anup Patel
2020-02-21 0:44 ` [PATCH v9 10/12] RISC-V: Add supported for ordered booting method using HSM Atish Patra
2020-02-21 6:08 ` Anup Patel
2020-02-21 0:44 ` [PATCH v9 11/12] RISC-V: Support cpu hotplug Atish Patra
2020-02-21 6:12 ` Anup Patel
2020-02-21 0:44 ` [PATCH v9 12/12] irqchip/sifive-plic: Initialize the plic handler when cpu comes online Atish Patra
2020-02-21 6:14 ` Anup Patel
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