From: Jisheng Zhang <jszhang3@mail.ustc.edu.cn>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Guo Ren <guoren@linux.alibaba.com>,
Masami Hiramatsu <mhiramat@kernel.org>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH] riscv: keep interrupts disabled for BREAKPOINT exception
Date: Tue, 30 Mar 2021 02:16:24 +0800 [thread overview]
Message-ID: <20210330021624.2b776386@xhacker> (raw)
From: Jisheng Zhang <jszhang@kernel.org>
Current riscv's kprobe handlers are run with both preemption and
interrupt enabled, this violates kprobe requirements. Fix this issue
by keeping interrupts disabled for BREAKPOINT exception.
Fixes: c22b0bcb1dd0 ("riscv: Add kprobes supported")
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
arch/riscv/kernel/entry.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
index 744f3209c48d..4114b65698ec 100644
--- a/arch/riscv/kernel/entry.S
+++ b/arch/riscv/kernel/entry.S
@@ -130,6 +130,8 @@ skip_context_tracking:
*/
andi t0, s1, SR_PIE
beqz t0, 1f
+ li t0, EXC_BREAKPOINT
+ beq s4, t0, 1f
#ifdef CONFIG_TRACE_IRQFLAGS
call trace_hardirqs_on
#endif
--
2.31.0
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next reply other threads:[~2021-03-30 0:01 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-29 18:16 Jisheng Zhang [this message]
2021-03-30 9:33 ` [PATCH] riscv: keep interrupts disabled for BREAKPOINT exception Masami Hiramatsu
2021-03-31 14:22 ` Jisheng Zhang
2021-04-01 0:30 ` Masami Hiramatsu
2021-04-03 18:30 ` Maciej W. Rozycki
2021-04-08 11:23 ` Jisheng Zhang
2021-04-08 22:38 ` Masami Hiramatsu
2021-04-08 22:45 ` Maciej W. Rozycki
2021-04-01 8:49 ` liaochang (A)
2021-04-02 13:32 ` Jisheng Zhang
2021-04-06 7:27 ` liaochang (A)
2021-04-12 1:09 ` Palmer Dabbelt
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