From: Conor Dooley <conor.dooley@microchip.com>
To: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Cc: Thierry Reding <thierry.reding@gmail.com>,
Daire McNamara <daire.mcnamara@microchip.com>,
<linux-kernel@vger.kernel.org>, <linux-pwm@vger.kernel.org>,
<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v17 1/2] pwm: add microchip soft ip corePWM driver
Date: Wed, 17 May 2023 11:57:14 +0100 [thread overview]
Message-ID: <20230517-sinner-remember-a5f6b86194ab@wendy> (raw)
In-Reply-To: <20230517102030.b4nyo2dmpfl7v7fk@pengutronix.de>
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On Wed, May 17, 2023 at 12:20:30PM +0200, Uwe Kleine-König wrote:
> Hello Conor,
>
> I found one remaining issue:
>
> On Fri, Apr 21, 2023 at 10:27:09AM +0100, Conor Dooley wrote:
> > +static u64 mchp_core_pwm_calc_duty(const struct pwm_state *state, u64 clk_rate,
> > + u8 prescale, u8 period_steps)
> > +{
> > + u64 duty_steps, tmp;
> > +
> > + /*
> > + * Calculate the duty cycle in multiples of the prescaled period:
> > + * duty_steps = duty_in_ns / step_in_ns
> > + * step_in_ns = (prescale * NSEC_PER_SEC) / clk_rate
> > + * The code below is rearranged slightly to only divide once.
> > + */
> > + tmp = (prescale + 1) * NSEC_PER_SEC;
>
> If prescale > 4 this overflows on 32bit archs, doesn't it?
Ooh, I think you are right.
> (I think prescale + 1 is promoted to unsigned int, then the
> multiplication is done and only then the range is extended to u64.
I'll respin with an explicit cast.
Thanks,
Conor.
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next prev parent reply other threads:[~2023-05-17 10:57 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-21 9:27 [PATCH v17 0/2] Microchip Soft IP corePWM driver Conor Dooley
2023-04-21 9:27 ` [PATCH v17 1/2] pwm: add microchip soft ip " Conor Dooley
2023-05-17 10:20 ` Uwe Kleine-König
2023-05-17 10:57 ` Conor Dooley [this message]
2023-04-21 9:27 ` [PATCH v17 2/2] MAINTAINERS: add pwm to PolarFire SoC entry Conor Dooley
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