From: kernel test robot <lkp@intel.com>
To: William Qiu <william.qiu@starfivetech.com>,
devicetree@vger.kernel.org, linux-spi@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Cc: oe-kbuild-all@lists.linux.dev, Mark Brown <broonie@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzk@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Emil Renner Berthing <kernel@esmil.dk>,
Ziv Xu <ziv.xu@starfivetech.com>,
William Qiu <william.qiu@starfivetech.com>
Subject: Re: [PATCH v2 2/3] spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI
Date: Fri, 2 Jun 2023 20:33:52 +0800 [thread overview]
Message-ID: <202306022017.UbwjjWRN-lkp@intel.com> (raw)
In-Reply-To: <20230602084925.215411-3-william.qiu@starfivetech.com>
Hi William,
kernel test robot noticed the following build warnings:
[auto build test WARNING on broonie-spi/for-next]
[also build test WARNING on linus/master v6.4-rc4 next-20230602]
[cannot apply to robh/for-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/William-Qiu/dt-bindings-qspi-cdns-qspi-nor-Add-clocks-for-StarFive-JH7110-SoC/20230602-165251
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
patch link: https://lore.kernel.org/r/20230602084925.215411-3-william.qiu%40starfivetech.com
patch subject: [PATCH v2 2/3] spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI
config: powerpc-allyesconfig (https://download.01.org/0day-ci/archive/20230602/202306022017.UbwjjWRN-lkp@intel.com/config)
compiler: powerpc-linux-gcc (GCC) 12.3.0
reproduce (this is a W=1 build):
mkdir -p ~/bin
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/6bbd49e32d407d210b6ea322696cef2e49bf3fa1
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review William-Qiu/dt-bindings-qspi-cdns-qspi-nor-Add-clocks-for-StarFive-JH7110-SoC/20230602-165251
git checkout 6bbd49e32d407d210b6ea322696cef2e49bf3fa1
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.3.0 ~/bin/make.cross W=1 O=build_dir ARCH=powerpc olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.3.0 ~/bin/make.cross W=1 O=build_dir ARCH=powerpc SHELL=/bin/bash drivers/spi/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202306022017.UbwjjWRN-lkp@intel.com/
All warnings (new ones prefixed by >>):
drivers/spi/spi-cadence-quadspi.c: In function 'cqspi_resume':
>> drivers/spi/spi-cadence-quadspi.c:1873:17: warning: ignoring return value of 'clk_bulk_prepare_enable' declared with attribute 'warn_unused_result' [-Wunused-result]
1873 | clk_bulk_prepare_enable(cqspi->num_clks, cqspi->clks);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
vim +1873 drivers/spi/spi-cadence-quadspi.c
1865
1866 static int cqspi_resume(struct device *dev)
1867 {
1868 struct cqspi_st *cqspi = dev_get_drvdata(dev);
1869 struct spi_master *master = dev_get_drvdata(dev);
1870
1871 clk_prepare_enable(cqspi->clk);
1872 if (of_device_is_compatible(dev->of_node, "starfive,jh7110-qspi"))
> 1873 clk_bulk_prepare_enable(cqspi->num_clks, cqspi->clks);
1874 cqspi_wait_idle(cqspi);
1875 cqspi_controller_init(cqspi);
1876
1877 cqspi->current_cs = -1;
1878 cqspi->sclk = 0;
1879
1880 return spi_master_resume(master);
1881 }
1882
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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next prev parent reply other threads:[~2023-06-02 12:35 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-02 8:49 [PATCH v2 0/3] Add initialization of clock for StarFive JH7110 SoC William Qiu
2023-06-02 8:49 ` [PATCH v2 1/3] dt-bindings: qspi: cdns,qspi-nor: Add clocks " William Qiu
2023-06-02 18:02 ` Conor Dooley
2023-06-06 3:34 ` William Qiu
2023-06-06 12:43 ` Krzysztof Kozlowski
2023-06-19 7:27 ` William Qiu
2023-06-02 8:49 ` [PATCH v2 2/3] spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI William Qiu
2023-06-02 12:33 ` kernel test robot [this message]
2023-06-06 3:32 ` William Qiu
2023-06-02 8:49 ` [PATCH v2 3/3] riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC William Qiu
2023-08-04 19:04 ` (subset) [PATCH v2 0/3] Add initialization of clock " Mark Brown
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