[GIT PULL] StarFive clock driver additions for v6.6

[Conor Dooley <conor@kernel.org>]

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Hey Stephen,

Please pull some clock driver additions for StarFive. I've had these
commits, other than a rebase to pick up R-b tags from Emil, out for LKP
to have a look at for a few days and they've gotten a clean bill of
health. Some of the dt-binding stuff "only" has a review from me, but
since I am a dt-binding maintainer that's fine, although maybe not
common knowledge yet.

I've also gone and re-arranged the patches in this PR relative to their
mailing list postings, so that the dt-binding patches can be used as a
base for adding the clock controller nodes & dependant peripherals to
the jh7110's dts.

I'm hoping that next time around, someone from StarFive can send you the
PR, maybe Walker, Hal or Xingyu are interested in that.

Thanks,
Conor.

The following changes since commit 06c2afb862f9da8dc5efa4b6076a0e48c3fbaaa5:

  Linux 6.5-rc1 (2023-07-09 13:53:13 -0700)

are available in the Git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ tags/clk-starfive-for-6.6

for you to fetch changes up to dae5448a327edef952faaf31bb3aedb0597ba62a:

  clk: starfive: Add StarFive JH7110 Video-Output clock driver (2023-07-19 18:08:05 +0100)

----------------------------------------------------------------
StarFive Clock Drivers for V6.6

Add support for the System-Top-Group, Image-Signal-Process, Video-Output
and PLL clocks on the JH7110 SoC. These drivers come with their
associate dt-bindings & the obligatory headers containing defines of
clock indices.

To maintain backwards compatibility, the PLL driver will fall back to
using the fixed factor clocks that were merged for v6.4. The binding has
been updated to only permit sourcing the PLL clocks from the PLL's clock
controller.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

----------------------------------------------------------------
Emil Renner Berthing (1):
      clk: starfive: Add StarFive JH7110 System-Top-Group clock driver

William Qiu (1):
      dt-bindings: soc: starfive: Add StarFive syscon module

Xingyu Wu (9):
      dt-bindings: clock: Add StarFive JH7110 PLL clock generator
      dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs
      dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator
      dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator
      dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator
      clk: starfive: Add StarFive JH7110 PLL clock driver
      clk: starfive: jh7110-sys: Add PLL clocks source from DTS
      clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver
      clk: starfive: Add StarFive JH7110 Video-Output clock driver

 .../bindings/clock/starfive,jh7110-ispcrg.yaml     |  87 ++++
 .../bindings/clock/starfive,jh7110-pll.yaml        |  46 ++
 .../bindings/clock/starfive,jh7110-stgcrg.yaml     |  82 ++++
 .../bindings/clock/starfive,jh7110-syscrg.yaml     |  18 +-
 .../bindings/clock/starfive,jh7110-voutcrg.yaml    |  90 ++++
 .../soc/starfive/starfive,jh7110-syscon.yaml       |  93 ++++
 MAINTAINERS                                        |  13 +
 drivers/clk/starfive/Kconfig                       |  33 ++
 drivers/clk/starfive/Makefile                      |   4 +
 drivers/clk/starfive/clk-starfive-jh7110-isp.c     | 232 ++++++++++
 drivers/clk/starfive/clk-starfive-jh7110-pll.c     | 507 +++++++++++++++++++++
 drivers/clk/starfive/clk-starfive-jh7110-stg.c     | 173 +++++++
 drivers/clk/starfive/clk-starfive-jh7110-sys.c     |  62 ++-
 drivers/clk/starfive/clk-starfive-jh7110-vout.c    | 239 ++++++++++
 drivers/clk/starfive/clk-starfive-jh7110.h         |   6 +
 include/dt-bindings/clock/starfive,jh7110-crg.h    |  80 ++++
 include/dt-bindings/reset/starfive,jh7110-crg.h    |  60 +++
 17 files changed, 1803 insertions(+), 22 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-ispcrg.yaml
 create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-pll.yaml
 create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-stgcrg.yaml
 create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-voutcrg.yaml
 create mode 100644 Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
 create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-isp.c
 create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-pll.c
 create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-stg.c
 create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-vout.c


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