[PATCH v5 0/3] Add initialization of clock for StarFive JH7110 SoC

[William Qiu <william.qiu@starfivetech.com>]

Hi,

This patchset adds initial rudimentary support for the StarFive
Quad SPI controller driver. And this driver will be used in
StarFive's VisionFive 2 board. In 6.4, the QSPI_AHB and QSPI_APB
clocks changed from the default ON state to the default OFF state,
so these clocks need to be enabled in the driver.At the same time,
dts patch is added to this series.

Changes v4->v5:
- Rebased to v6.5rc2.
- Changed the way to initialization the clocks.
- Changed the layout for the SPI flash.

Changes v3->v4:
- Added minItems for clocks.
- Added clock names property.
- Fixed formatting issues.

Changes v2->v3:
- Rebased to v6.4rc6.
- Renamed the clock names.
- Changed the variable definition type.

Changes v1->v2:
- Renamed the clock names.
- Specified a different array of clocks.
- Used clk_bulk_ APIs.

The patch series is based on v6.5rc2.

William Qiu (3):
  dt-bindings: qspi: cdns,qspi-nor: Add clocks for StarFive JH7110 SoC
  spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI
  riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC

 .../bindings/spi/cdns,qspi-nor.yaml           | 12 +++-
 .../jh7110-starfive-visionfive-2.dtsi         | 36 ++++++++++
 arch/riscv/boot/dts/starfive/jh7110.dtsi      | 19 ++++++
 drivers/spi/spi-cadence-quadspi.c             | 67 +++++++++++++++++++
 4 files changed, 133 insertions(+), 1 deletion(-)

--
2.34.1


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