From: Minda Chen <minda.chen@starfivetech.com>
To: "Conor Dooley" <conor@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Daire McNamara" <daire.mcnamara@microchip.com>,
"Emil Renner Berthing" <emil.renner.berthing@canonical.com>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>
Cc: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-riscv@lists.infradead.org>, <linux-pci@vger.kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Philipp Zabel <p.zabel@pengutronix.de>,
Mason Huo <mason.huo@starfivetech.com>,
Leyfoon Tan <leyfoon.tan@starfivetech.com>,
Kevin Xie <kevin.xie@starfivetech.com>,
Minda Chen <minda.chen@starfivetech.com>
Subject: [PATCH v13 04/21] PCI: microchip: Add bridge_addr field to struct mc_pcie
Date: Thu, 14 Dec 2023 15:28:22 +0800 [thread overview]
Message-ID: <20231214072839.2367-5-minda.chen@starfivetech.com> (raw)
In-Reply-To: <20231214072839.2367-1-minda.chen@starfivetech.com>
For bridge address base is common PLDA field, Add this to struct mc_pcie
first.
INTx and MSI codes interrupts codes will get the bridge base address from
port->bridge_addr. These codes will be changed to common codes.
axi_base_addr is Microchip its own data.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
.../pci/controller/plda/pcie-microchip-host.c | 23 ++++++++-----------
1 file changed, 9 insertions(+), 14 deletions(-)
diff --git a/drivers/pci/controller/plda/pcie-microchip-host.c b/drivers/pci/controller/plda/pcie-microchip-host.c
index a34ec6aad4be..60870ee1f1c9 100644
--- a/drivers/pci/controller/plda/pcie-microchip-host.c
+++ b/drivers/pci/controller/plda/pcie-microchip-host.c
@@ -195,6 +195,7 @@ struct mc_pcie {
struct irq_domain *event_domain;
raw_spinlock_t lock;
struct mc_msi msi;
+ void __iomem *bridge_addr;
};
struct cause {
@@ -339,8 +340,7 @@ static void mc_handle_msi(struct irq_desc *desc)
struct irq_chip *chip = irq_desc_get_chip(desc);
struct device *dev = port->dev;
struct mc_msi *msi = &port->msi;
- void __iomem *bridge_base_addr =
- port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
+ void __iomem *bridge_base_addr = port->bridge_addr;
unsigned long status;
u32 bit;
int ret;
@@ -365,8 +365,7 @@ static void mc_handle_msi(struct irq_desc *desc)
static void mc_msi_bottom_irq_ack(struct irq_data *data)
{
struct mc_pcie *port = irq_data_get_irq_chip_data(data);
- void __iomem *bridge_base_addr =
- port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
+ void __iomem *bridge_base_addr = port->bridge_addr;
u32 bitpos = data->hwirq;
writel_relaxed(BIT(bitpos), bridge_base_addr + ISTATUS_MSI);
@@ -488,8 +487,7 @@ static void mc_handle_intx(struct irq_desc *desc)
struct mc_pcie *port = irq_desc_get_handler_data(desc);
struct irq_chip *chip = irq_desc_get_chip(desc);
struct device *dev = port->dev;
- void __iomem *bridge_base_addr =
- port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
+ void __iomem *bridge_base_addr = port->bridge_addr;
unsigned long status;
u32 bit;
int ret;
@@ -514,8 +512,7 @@ static void mc_handle_intx(struct irq_desc *desc)
static void mc_ack_intx_irq(struct irq_data *data)
{
struct mc_pcie *port = irq_data_get_irq_chip_data(data);
- void __iomem *bridge_base_addr =
- port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
+ void __iomem *bridge_base_addr = port->bridge_addr;
u32 mask = BIT(data->hwirq + PM_MSI_INT_INTX_SHIFT);
writel_relaxed(mask, bridge_base_addr + ISTATUS_LOCAL);
@@ -524,8 +521,7 @@ static void mc_ack_intx_irq(struct irq_data *data)
static void mc_mask_intx_irq(struct irq_data *data)
{
struct mc_pcie *port = irq_data_get_irq_chip_data(data);
- void __iomem *bridge_base_addr =
- port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
+ void __iomem *bridge_base_addr = port->bridge_addr;
unsigned long flags;
u32 mask = BIT(data->hwirq + PM_MSI_INT_INTX_SHIFT);
u32 val;
@@ -540,8 +536,7 @@ static void mc_mask_intx_irq(struct irq_data *data)
static void mc_unmask_intx_irq(struct irq_data *data)
{
struct mc_pcie *port = irq_data_get_irq_chip_data(data);
- void __iomem *bridge_base_addr =
- port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
+ void __iomem *bridge_base_addr = port->bridge_addr;
unsigned long flags;
u32 mask = BIT(data->hwirq + PM_MSI_INT_INTX_SHIFT);
u32 val;
@@ -896,8 +891,7 @@ static void mc_pcie_setup_window(void __iomem *bridge_base_addr, u32 index,
static int mc_pcie_setup_windows(struct platform_device *pdev,
struct mc_pcie *port)
{
- void __iomem *bridge_base_addr =
- port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
+ void __iomem *bridge_base_addr = port->bridge_addr;
struct pci_host_bridge *bridge = platform_get_drvdata(pdev);
struct resource_entry *entry;
u64 pci_addr;
@@ -1081,6 +1075,7 @@ static int mc_host_probe(struct platform_device *pdev)
mc_disable_interrupts(port);
bridge_base_addr = port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
+ port->bridge_addr = bridge_base_addr;
/* Allow enabling MSI by disabling MSI-X */
val = readl(bridge_base_addr + PCIE_PCI_IRQ_DW0);
--
2.17.1
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next prev parent reply other threads:[~2023-12-14 7:29 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-14 7:28 [PATCH v13 0/21] Refactoring Microchip PCIe driver and add StarFive PCIe Minda Chen
2023-12-14 7:28 ` [PATCH v13 01/21] dt-bindings: PCI: Add PLDA XpressRICH PCIe host common properties Minda Chen
2023-12-14 7:28 ` [PATCH v13 02/21] PCI: microchip: Move pcie-microchip-host.c to plda directory Minda Chen
2023-12-14 7:28 ` [PATCH v13 03/21] PCI: microchip: Move PLDA IP register macros to pcie-plda.h Minda Chen
2023-12-14 7:28 ` Minda Chen [this message]
2023-12-14 7:28 ` [PATCH v13 05/21] PCI: microchip: Rename two PCIe data structures Minda Chen
2023-12-14 7:28 ` [PATCH v13 06/21] PCI: microchip: Move PCIe host data structures to plda-pcie.h Minda Chen
2023-12-14 7:28 ` [PATCH v13 07/21] PCI: microchip: Rename two setup functions Minda Chen
2023-12-14 7:28 ` [PATCH v13 08/21] PCI: microchip: Change the argument of plda_pcie_setup_iomems() Minda Chen
2023-12-14 7:28 ` [PATCH v13 09/21] PCI: microchip: Move setup functions to pcie-plda-host.c Minda Chen
2023-12-27 15:49 ` Lorenzo Pieralisi
2023-12-28 9:46 ` Minda Chen
2023-12-14 7:28 ` [PATCH v13 10/21] PCI: microchip: Rename interrupt related functions Minda Chen
2023-12-27 15:52 ` Lorenzo Pieralisi
2023-12-29 3:44 ` Minda Chen
2023-12-14 7:28 ` [PATCH v13 11/21] PCI: microchip: Add num_events field to struct plda_pcie_rp Minda Chen
2023-12-27 15:55 ` Lorenzo Pieralisi
2023-12-29 3:46 ` Minda Chen
2023-12-14 7:28 ` [PATCH v13 12/21] PCI: microchip: Add request_event_irq() callback function Minda Chen
2023-12-27 16:01 ` Lorenzo Pieralisi
2023-12-28 11:58 ` Minda Chen
2023-12-14 7:28 ` [PATCH v13 13/21] PCI: microchip: Add INTx and MSI event num to struct plda_event Minda Chen
2023-12-14 7:28 ` [PATCH v13 14/21] PCI: microchip: Add get_events() callback and add PLDA get_event() Minda Chen
2023-12-27 16:31 ` Lorenzo Pieralisi
2023-12-28 10:04 ` Minda Chen
2023-12-14 7:28 ` [PATCH v13 15/21] PCI: microchip: Add event irqchip field to host port and add PLDA irqchip Minda Chen
2023-12-21 10:56 ` Minda Chen
2023-12-21 15:32 ` Lorenzo Pieralisi
2023-12-22 11:18 ` Minda Chen
2023-12-27 12:43 ` Lorenzo Pieralisi
2023-12-28 11:25 ` Minda Chen
2023-12-14 7:28 ` [PATCH v13 16/21] PCI: microchip: Move IRQ functions to pcie-plda-host.c Minda Chen
2023-12-14 7:28 ` [PATCH v13 17/21] PCI: plda: Add host init/deinit and map bus functions Minda Chen
2023-12-14 7:28 ` [PATCH v13 18/21] dt-bindings: PCI: Add StarFive JH7110 PCIe controller Minda Chen
2023-12-14 7:28 ` [PATCH v13 19/21] PCI: Add PCIE_RESET_CONFIG_DEVICE_WAIT_MS waiting time value Minda Chen
2023-12-27 16:03 ` Lorenzo Pieralisi
2023-12-27 19:08 ` Bjorn Helgaas
2023-12-14 7:28 ` [PATCH v13 20/21] PCI: starfive: Add JH7110 PCIe controller Minda Chen
2023-12-14 7:28 ` [PATCH v13 21/21] riscv: dts: starfive: add PCIe dts configuration for JH7110 Minda Chen
2024-01-03 22:40 ` [PATCH v13 0/21] Refactoring Microchip PCIe driver and add StarFive PCIe Kevin Hilman
2024-01-05 2:35 ` 回复: " Kevin Xie
2024-01-05 17:28 ` Kevin Hilman
2024-01-08 10:48 ` 回复: " Kevin Xie
2024-01-10 16:29 ` Emil Renner Berthing
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