From: Minda Chen <minda.chen@starfivetech.com>
To: "Conor Dooley" <conor@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Daire McNamara" <daire.mcnamara@microchip.com>,
"Emil Renner Berthing" <emil.renner.berthing@canonical.com>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-pci@vger.kernel.org,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Philipp Zabel <p.zabel@pengutronix.de>,
Mason Huo <mason.huo@starfivetech.com>,
Leyfoon Tan <leyfoon.tan@starfivetech.com>,
Kevin Xie <kevin.xie@starfivetech.com>,
Minda Chen <minda.chen@starfivetech.com>
Subject: [PATCH v14 09/22] PCI: microchip: Move setup functions to pcie-plda-host.c
Date: Mon, 8 Jan 2024 19:05:59 +0800 [thread overview]
Message-ID: <20240108110612.19048-10-minda.chen@starfivetech.com> (raw)
In-Reply-To: <20240108110612.19048-1-minda.chen@starfivetech.com>
Move setup functions to common pcie-plda-host.c. So these two functions
can be re-used.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/pci/controller/plda/Kconfig | 4 +
drivers/pci/controller/plda/Makefile | 1 +
.../pci/controller/plda/pcie-microchip-host.c | 59 ---------------
drivers/pci/controller/plda/pcie-plda-host.c | 74 +++++++++++++++++++
drivers/pci/controller/plda/pcie-plda.h | 5 ++
5 files changed, 84 insertions(+), 59 deletions(-)
create mode 100644 drivers/pci/controller/plda/pcie-plda-host.c
diff --git a/drivers/pci/controller/plda/Kconfig b/drivers/pci/controller/plda/Kconfig
index 5cb3be4fc98c..e54a82ee94f5 100644
--- a/drivers/pci/controller/plda/Kconfig
+++ b/drivers/pci/controller/plda/Kconfig
@@ -3,10 +3,14 @@
menu "PLDA-based PCIe controllers"
depends on PCI
+config PCIE_PLDA_HOST
+ bool
+
config PCIE_MICROCHIP_HOST
tristate "Microchip AXI PCIe controller"
depends on PCI_MSI && OF
select PCI_HOST_COMMON
+ select PCIE_PLDA_HOST
help
Say Y here if you want kernel to support the Microchip AXI PCIe
Host Bridge driver.
diff --git a/drivers/pci/controller/plda/Makefile b/drivers/pci/controller/plda/Makefile
index e1a265cbf91c..4340ab007f44 100644
--- a/drivers/pci/controller/plda/Makefile
+++ b/drivers/pci/controller/plda/Makefile
@@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_PCIE_PLDA_HOST) += pcie-plda-host.o
obj-$(CONFIG_PCIE_MICROCHIP_HOST) += pcie-microchip-host.o
diff --git a/drivers/pci/controller/plda/pcie-microchip-host.c b/drivers/pci/controller/plda/pcie-microchip-host.c
index 805870aed61d..573ad31c578a 100644
--- a/drivers/pci/controller/plda/pcie-microchip-host.c
+++ b/drivers/pci/controller/plda/pcie-microchip-host.c
@@ -838,65 +838,6 @@ static int mc_pcie_init_irq_domains(struct plda_pcie_rp *port)
return mc_allocate_msi_domains(port);
}
-static void plda_pcie_setup_window(void __iomem *bridge_base_addr, u32 index,
- phys_addr_t axi_addr, phys_addr_t pci_addr,
- size_t size)
-{
- u32 atr_sz = ilog2(size) - 1;
- u32 val;
-
- if (index == 0)
- val = PCIE_CONFIG_INTERFACE;
- else
- val = PCIE_TX_RX_INTERFACE;
-
- writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
- ATR0_AXI4_SLV0_TRSL_PARAM);
-
- val = lower_32_bits(axi_addr) | (atr_sz << ATR_SIZE_SHIFT) |
- ATR_IMPL_ENABLE;
- writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
- ATR0_AXI4_SLV0_SRCADDR_PARAM);
-
- val = upper_32_bits(axi_addr);
- writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
- ATR0_AXI4_SLV0_SRC_ADDR);
-
- val = lower_32_bits(pci_addr);
- writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
- ATR0_AXI4_SLV0_TRSL_ADDR_LSB);
-
- val = upper_32_bits(pci_addr);
- writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
- ATR0_AXI4_SLV0_TRSL_ADDR_UDW);
-
- val = readl(bridge_base_addr + ATR0_PCIE_WIN0_SRCADDR_PARAM);
- val |= (ATR0_PCIE_ATR_SIZE << ATR0_PCIE_ATR_SIZE_SHIFT);
- writel(val, bridge_base_addr + ATR0_PCIE_WIN0_SRCADDR_PARAM);
- writel(0, bridge_base_addr + ATR0_PCIE_WIN0_SRC_ADDR);
-}
-
-static int plda_pcie_setup_iomems(struct pci_host_bridge *bridge,
- struct plda_pcie_rp *port)
-{
- void __iomem *bridge_base_addr = port->bridge_addr;
- struct resource_entry *entry;
- u64 pci_addr;
- u32 index = 1;
-
- resource_list_for_each_entry(entry, &bridge->windows) {
- if (resource_type(entry->res) == IORESOURCE_MEM) {
- pci_addr = entry->res->start - entry->offset;
- plda_pcie_setup_window(bridge_base_addr, index,
- entry->res->start, pci_addr,
- resource_size(entry->res));
- index++;
- }
- }
-
- return 0;
-}
-
static inline void mc_clear_secs(struct mc_pcie *port)
{
void __iomem *ctrl_base_addr = port->axi_base_addr + MC_PCIE_CTRL_ADDR;
diff --git a/drivers/pci/controller/plda/pcie-plda-host.c b/drivers/pci/controller/plda/pcie-plda-host.c
new file mode 100644
index 000000000000..40139d998568
--- /dev/null
+++ b/drivers/pci/controller/plda/pcie-plda-host.c
@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * PLDA PCIe XpressRich host controller driver
+ *
+ * Copyright (C) 2023 Microchip Co. Ltd
+ *
+ * Author: Daire McNamara <daire.mcnamara@microchip.com>
+ */
+
+#include <linux/pci_regs.h>
+#include <linux/pci-ecam.h>
+
+#include "pcie-plda.h"
+
+void plda_pcie_setup_window(void __iomem *bridge_base_addr, u32 index,
+ phys_addr_t axi_addr, phys_addr_t pci_addr,
+ size_t size)
+{
+ u32 atr_sz = ilog2(size) - 1;
+ u32 val;
+
+ if (index == 0)
+ val = PCIE_CONFIG_INTERFACE;
+ else
+ val = PCIE_TX_RX_INTERFACE;
+
+ writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
+ ATR0_AXI4_SLV0_TRSL_PARAM);
+
+ val = lower_32_bits(axi_addr) | (atr_sz << ATR_SIZE_SHIFT) |
+ ATR_IMPL_ENABLE;
+ writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
+ ATR0_AXI4_SLV0_SRCADDR_PARAM);
+
+ val = upper_32_bits(axi_addr);
+ writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
+ ATR0_AXI4_SLV0_SRC_ADDR);
+
+ val = lower_32_bits(pci_addr);
+ writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
+ ATR0_AXI4_SLV0_TRSL_ADDR_LSB);
+
+ val = upper_32_bits(pci_addr);
+ writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
+ ATR0_AXI4_SLV0_TRSL_ADDR_UDW);
+
+ val = readl(bridge_base_addr + ATR0_PCIE_WIN0_SRCADDR_PARAM);
+ val |= (ATR0_PCIE_ATR_SIZE << ATR0_PCIE_ATR_SIZE_SHIFT);
+ writel(val, bridge_base_addr + ATR0_PCIE_WIN0_SRCADDR_PARAM);
+ writel(0, bridge_base_addr + ATR0_PCIE_WIN0_SRC_ADDR);
+}
+EXPORT_SYMBOL_GPL(plda_pcie_setup_window);
+
+int plda_pcie_setup_iomems(struct pci_host_bridge *bridge,
+ struct plda_pcie_rp *port)
+{
+ void __iomem *bridge_base_addr = port->bridge_addr;
+ struct resource_entry *entry;
+ u64 pci_addr;
+ u32 index = 1;
+
+ resource_list_for_each_entry(entry, &bridge->windows) {
+ if (resource_type(entry->res) == IORESOURCE_MEM) {
+ pci_addr = entry->res->start - entry->offset;
+ plda_pcie_setup_window(bridge_base_addr, index,
+ entry->res->start, pci_addr,
+ resource_size(entry->res));
+ index++;
+ }
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(plda_pcie_setup_iomems);
diff --git a/drivers/pci/controller/plda/pcie-plda.h b/drivers/pci/controller/plda/pcie-plda.h
index 7bec6a470758..3a17d8ab5bb2 100644
--- a/drivers/pci/controller/plda/pcie-plda.h
+++ b/drivers/pci/controller/plda/pcie-plda.h
@@ -126,4 +126,9 @@ struct plda_pcie_rp {
void __iomem *bridge_addr;
};
+void plda_pcie_setup_window(void __iomem *bridge_base_addr, u32 index,
+ phys_addr_t axi_addr, phys_addr_t pci_addr,
+ size_t size);
+int plda_pcie_setup_iomems(struct pci_host_bridge *bridge,
+ struct plda_pcie_rp *port);
#endif
--
2.17.1
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next prev parent reply other threads:[~2024-01-08 11:07 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-08 11:05 [PATCH v14 0/22] Refactoring Microchip PCIe driver and add StarFive PCIe Minda Chen
2024-01-08 11:05 ` [PATCH v14 01/22] dt-bindings: PCI: Add PLDA XpressRICH PCIe host common properties Minda Chen
2024-01-08 11:21 ` 回复: " Minda Chen
2024-01-08 11:05 ` [PATCH v14 02/22] PCI: microchip: Move pcie-microchip-host.c to plda directory Minda Chen
2024-01-08 11:05 ` [PATCH v14 03/22] PCI: microchip: Move PLDA IP register macros to pcie-plda.h Minda Chen
2024-01-08 11:05 ` [PATCH v14 04/22] PCI: microchip: Add bridge_addr field to struct mc_pcie Minda Chen
2024-01-08 11:05 ` [PATCH v14 05/22] PCI: microchip: Rename two PCIe data structures Minda Chen
2024-01-08 11:05 ` [PATCH v14 06/22] PCI: microchip: Move PCIe host data structures to plda-pcie.h Minda Chen
2024-01-08 11:05 ` [PATCH v14 07/22] PCI: microchip: Rename two setup functions Minda Chen
2024-01-08 11:05 ` [PATCH v14 08/22] PCI: microchip: Change the argument of plda_pcie_setup_iomems() Minda Chen
2024-01-08 11:05 ` Minda Chen [this message]
2024-01-08 11:06 ` [PATCH v14 10/22] PCI: microchip: Rename interrupt related functions Minda Chen
2024-01-08 11:06 ` [PATCH v14 11/22] PCI: microchip: Add num_events field to struct plda_pcie_rp Minda Chen
2024-01-08 11:06 ` [PATCH v14 12/22] PCI: microchip: Add request_event_irq() callback function Minda Chen
2024-01-08 11:06 ` [PATCH v14 13/22] PCI: microchip: Add INTx and MSI event num to struct plda_event Minda Chen
2024-01-08 11:06 ` [PATCH v14 14/22] PCI: microchip: Add get_events() callback and add PLDA get_event() Minda Chen
2024-01-08 11:15 ` 回复: " Minda Chen
2024-01-08 11:06 ` [PATCH v14 15/22] PCI: microchip: Add event irqchip field to host port and add PLDA irqchip Minda Chen
2024-01-08 11:17 ` 回复: " Minda Chen
2024-01-08 11:06 ` [PATCH v14 16/22] PCI: microchip: Move IRQ functions to pcie-plda-host.c Minda Chen
2024-01-08 11:06 ` [PATCH v14 17/22] pci: plda: Add event bitmap field to struct plda_pcie_rp Minda Chen
2024-01-08 11:06 ` [PATCH v14 18/22] PCI: plda: Add host init/deinit and map bus functions Minda Chen
2024-01-08 11:06 ` [PATCH v14 19/22] dt-bindings: PCI: Add StarFive JH7110 PCIe controller Minda Chen
2024-01-08 11:06 ` [PATCH v14 20/22] PCI: Add PCIE_RESET_CONFIG_DEVICE_WAIT_MS waiting time value Minda Chen
2024-01-08 11:06 ` [PATCH v14 21/22] PCI: starfive: Add JH7110 PCIe controller Minda Chen
2024-01-08 11:06 ` [PATCH v14 22/22] riscv: dts: starfive: add PCIe dts configuration for JH7110 Minda Chen
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