From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Keith Zhao <keith.zhao@starfivetech.com>,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org
Cc: David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Emil Renner Berthing <kernel@esmil.dk>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
Philipp Zabel <p.zabel@pengutronix.de>,
Sumit Semwal <sumit.semwal@linaro.org>,
christian.koenig@amd.com, Bjorn Andersson <andersson@kernel.org>,
Heiko Stuebner <heiko@sntech.de>, Shawn Guo <shawnguo@kernel.org>,
Jagan Teki <jagan@edgeble.ai>,
Chris Morgan <macromorgan@hotmail.com>,
Jack Zhu <jack.zhu@starfivetech.com>,
Shengyang Chen <shengyang.chen@starfivetech.com>,
Changhuang Liang <changhuang.liang@starfivetech.com>
Subject: Re: [PATCH 1/9] dt-bindings: display: Add yamls for JH7110 display subsystem
Date: Wed, 7 Jun 2023 09:35:13 +0200 [thread overview]
Message-ID: <90b9fd0d-fded-0c7f-d58c-c35bf225f6f9@linaro.org> (raw)
In-Reply-To: <20230602074043.33872-2-keith.zhao@starfivetech.com>
On 02/06/2023 09:40, Keith Zhao wrote:
> Add bindings for JH7110 display subsystem which
> has a display controller verisilicon dc8200
> and an HDMI interface.
>
> Signed-off-by: Keith Zhao <keith.zhao@starfivetech.com>
> ---
> .../display/verisilicon/starfive-hdmi.yaml | 93 +++++++++++++++
> .../display/verisilicon/verisilicon-dc.yaml | 110 ++++++++++++++++++
> .../display/verisilicon/verisilicon-drm.yaml | 42 +++++++
> .../devicetree/bindings/vendor-prefixes.yaml | 2 +
> MAINTAINERS | 7 ++
> 5 files changed, 254 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/verisilicon/starfive-hdmi.yaml
> create mode 100644 Documentation/devicetree/bindings/display/verisilicon/verisilicon-dc.yaml
> create mode 100644 Documentation/devicetree/bindings/display/verisilicon/verisilicon-drm.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/verisilicon/starfive-hdmi.yaml b/Documentation/devicetree/bindings/display/verisilicon/starfive-hdmi.yaml
> new file mode 100644
> index 000000000000..c30b7954a355
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/verisilicon/starfive-hdmi.yaml
Filename matching compatible.
> @@ -0,0 +1,93 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/verisilicon/starfive-hdmi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: StarFive HDMI transmiter
> +
> +description:
> + The StarFive SoC uses the HDMI signal transmiter based on innosilicon IP
> + to generate HDMI signal from its input and transmit the signal to the screen.
> +
> +maintainers:
> + - Keith Zhao <keith.zhao@starfivetech.com>
> + - ShengYang Chen <shengyang.chen@starfivetech.com>
> +
> +properties:
> + compatible:
> + const: starfive,hdmi
Conor already commented on this.
> +
> + reg:
> + minItems: 1
> +
> + interrupts:
> + items:
> + - description: The HDMI hot plug detection interrupt.
> +
> + clocks:
> + items:
> + - description: System clock of HDMI module.
> + - description: Mclk clock of HDMI audio.
> + - description: Bclk clock of HDMI audio.
> + - description: Pixel clock generated by HDMI module.
> +
> + clock-names:
> + items:
> + - const: sysclk
> + - const: mclk
> + - const: bclk
> + - const: pclk
> +
> + resets:
> + items:
> + - description: Reset for HDMI module.
> +
> + reset-names:
> + items:
> + - const: hdmi_tx
> +
> + '#sound-dai-cells':
> + const: 0
> +
> + port:
> + $ref: /schemas/graph.yaml#/properties/port
> + description:
> + Port node with one endpoint connected to a display connector node.
One port, so how do you get data? From where does it come?
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> + - resets
> + - reset-names
> + - '#sound-dai-cells'
> + - port
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + hdmi: hdmi@29590000 {
> + compatible = "starfive,hdmi";
> + reg = <0x29590000 0x4000>;
> + interrupts = <99>;
> + clocks = <&voutcrg 17>,
> + <&voutcrg 15>,
> + <&voutcrg 16>,
> + <&hdmitx0_pixelclk>;
> + clock-names = "sysclk", "mclk","bclk","pclk";
> + resets = <&voutcrg 9>;
> + reset-names = "hdmi_tx";
> + #sound-dai-cells = <0>;
> + hdmi_in: port {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + hdmi_input: endpoint@0 {
> + reg = <0>;
> + remote-endpoint = <&dc_out_dpi0>;
Mixed up indentation.
> + };
> + };
> + };
> diff --git a/Documentation/devicetree/bindings/display/verisilicon/verisilicon-dc.yaml b/Documentation/devicetree/bindings/display/verisilicon/verisilicon-dc.yaml
> new file mode 100644
> index 000000000000..1322502c4cde
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/verisilicon/verisilicon-dc.yaml
Same problem.
> @@ -0,0 +1,110 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/verisilicon/verisilicon-dc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: StarFive display controller
> +
> +description:
> + The StarFive SoC uses the display controller based on Verisilicon IP
> + to transfer the image data from a video memory
> + buffer to an external LCD interface.
> +
> +maintainers:
> + - Keith Zhao <keith.zhao@starfivetech.com>
> + - ShengYang Chen <shengyang.chen@starfivetech.com>
> +
> +properties:
> + compatible:
> + const: verisilicon,dc8200
> +
> + reg:
> + maxItems: 3
> +
> + interrupts:
> + items:
> + - description: The interrupt will be generated when DC finish one frame
> +
> + clocks:
> + items:
> + - description: Clock for display system noc bus.
> + - description: Pixel clock for display channel 0.
> + - description: Pixel clock for display channel 1.
> + - description: Clock for axi interface of display controller.
> + - description: Core clock for display controller.
> + - description: Clock for ahb interface of display controller.
> + - description: External HDMI pixel clock.
> + - description: Parent clock for pixel clock
> +
> + clock-names:
> + items:
> + - const: clk_vout_noc_disp
Why do you need "clk_" prefixes? Drop.
> + - const: clk_vout_pix0
> + - const: clk_vout_pix1
> + - const: clk_vout_axi
> + - const: clk_vout_core
> + - const: clk_vout_vout_ahb
> + - const: hdmitx0_pixel
> + - const: clk_vout_dc8200
> +
> + resets:
> + items:
> + - description: Reset for axi interface of display controller.
> + - description: Reset for ahb interface of display controller.
> + - description: Core reset of display controller.
> +
> + reset-names:
> + items:
> + - const: rst_vout_axi
Drop rst_
> + - const: rst_vout_ahb
> + - const: rst_vout_core
> +
> + port:
> + $ref: /schemas/graph.yaml#/properties/port
> + description:
> + Port node with one endpoint connected to a hdmi node.
Oh really? But your HDMI does not allow it! Submit DTS user of all this
so we can see it.
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> + - resets
> + - reset-names
> + - port
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + dc8200: dc8200@29400000 {
Node names should be generic. See also explanation and list of examples
in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
> + compatible = "verisilicon,dc8200";
> + reg = <0x29400000 0x100>,
> + <0x29400800 0x2000>,
> + <0x295B0000 0x90>;
Lowercase hex
> + interrupts = <95>;
> + clocks = <&syscrg 60>,
> + <&voutcrg 7>,
> + <&voutcrg 8>,
> + <&voutcrg 4>,
> + <&voutcrg 5>,
> + <&voutcrg 6>,
> + <&hdmitx0_pixelclk>,
> + <&voutcrg 1>;
> + clock-names = "clk_vout_noc_disp", "clk_vout_pix0", "clk_vout_pix1", "clk_vout_axi",
> + "clk_vout_core", "clk_vout_vout_ahb", "hdmitx0_pixel","clk_vout_dc8200";
> + resets = <&voutcrg 0>,
> + <&voutcrg 1>,
> + <&voutcrg 2>;
> + reset-names = "rst_vout_axi","rst_vout_ahb","rst_vout_core";
> + dc_out: port {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + dc_out_dpi0: endpoint@0 {
> + reg = <0>;
> + remote-endpoint = <&hdmi_input>;
> + };
> + };
> + };
> diff --git a/Documentation/devicetree/bindings/display/verisilicon/verisilicon-drm.yaml b/Documentation/devicetree/bindings/display/verisilicon/verisilicon-drm.yaml
> new file mode 100644
> index 000000000000..aed8d4af2c55
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/verisilicon/verisilicon-drm.yaml
Same comments
> @@ -0,0 +1,42 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/verisilicon/verisilicon-drm.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Verisilicon DRM master device
What is DRM? If Linux thingy, then it does not suit bindings.
Give it proper description of hardware.
> +
> +maintainers:
> + - Keith Zhao <keith.zhao@starfivetech.com>
> + - ShengYang Chen <shengyang.chen@starfivetech.com>
> +
> +description: |
Do not need '|' unless you need to preserve formatting.
> + The Verisilicon DRM master device is a virtual device needed to list all
We do not describe virtual devices in bindings.
NAK.
> + display controller or other display interface nodes that comprise the
> + graphics subsystem.
> +
> +properties:
> + compatible:
> + const: verisilicon,display-subsystem
> +
> + ports:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
Ports is an object, not array. Drop entire property. It's just wrong.
Best regards,
Krzysztof
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-06-07 7:35 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-02 7:40 [PATCH 0/9] Add DRM driver for StarFive SoC JH7110 Keith Zhao
2023-06-02 7:40 ` [PATCH 1/9] dt-bindings: display: Add yamls for JH7110 display subsystem Keith Zhao
2023-06-02 18:21 ` Conor Dooley
2023-06-06 18:41 ` Shengyu Qu
2023-06-06 22:22 ` Heiko Stübner
2023-06-06 22:37 ` Conor Dooley
2023-06-07 6:41 ` Maxime Ripard
2023-06-07 8:02 ` Keith Zhao
2023-06-07 8:40 ` Heiko Stübner
2023-06-07 7:35 ` Krzysztof Kozlowski [this message]
2023-06-02 7:40 ` [PATCH 2/9] riscv: dts: starfive: jh7110: add dc&hdmi controller node Keith Zhao
2023-06-07 7:38 ` Krzysztof Kozlowski
2023-06-02 7:40 ` [PATCH 3/9] drm/verisilicon: Add basic drm driver Keith Zhao
2023-06-07 8:53 ` Lucas Stach
2023-07-25 3:12 ` Keith Zhao
2023-07-25 11:23 ` Keith Zhao
2023-06-19 12:59 ` Thomas Zimmermann
2023-07-07 18:09 ` Nicolas Dufresne
2023-07-08 19:11 ` Thomas Zimmermann
2023-07-13 15:14 ` Nicolas Dufresne
2023-07-03 18:42 ` Shengyu Qu
2023-07-04 6:09 ` Keith Zhao
2023-06-02 7:40 ` [PATCH 4/9] drm/verisilicon: Add gem driver for JH7110 SoC Keith Zhao
2023-06-19 13:18 ` Thomas Zimmermann
2023-07-20 10:00 ` Keith Zhao
2023-06-19 14:22 ` Thomas Zimmermann
2023-06-21 10:44 ` Thomas Zimmermann
2023-06-02 7:40 ` [PATCH 5/9] drm/verisilicon: Add mode config funcs Keith Zhao
2023-06-21 11:04 ` Thomas Zimmermann
2023-07-21 9:06 ` Keith Zhao
2023-06-02 7:40 ` [PATCH 6/9] drm/verisilicon: Add drm crtc funcs Keith Zhao
2023-06-30 11:55 ` Thomas Zimmermann
2023-07-21 11:57 ` Keith Zhao
2023-07-21 12:32 ` Sam Ravnborg
2023-06-02 7:40 ` [PATCH 7/9] drm/verisilicon: Add drm plane funcs Keith Zhao
2023-06-30 12:14 ` Thomas Zimmermann
2023-07-10 16:46 ` Shengyu Qu
2023-07-11 1:44 ` Keith Zhao
2023-06-02 7:40 ` [PATCH 8/9] drm/verisilicon: Add verisilicon dc controller driver Keith Zhao
2023-06-30 12:36 ` Thomas Zimmermann
2023-06-02 7:40 ` [PATCH 9/9] drm/verisilicon: Add starfive hdmi driver Keith Zhao
2023-06-05 8:08 ` Philipp Zabel
2023-06-05 9:56 ` Maxime Ripard
2023-06-23 2:38 ` Hoegeun Kwon
2023-06-26 5:34 ` Keith Zhao
2023-06-22 18:19 ` [PATCH 0/9] Add DRM driver for StarFive SoC JH7110 Palmer Dabbelt
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=90b9fd0d-fded-0c7f-d58c-c35bf225f6f9@linaro.org \
--to=krzysztof.kozlowski@linaro.org \
--cc=airlied@gmail.com \
--cc=andersson@kernel.org \
--cc=aou@eecs.berkeley.edu \
--cc=changhuang.liang@starfivetech.com \
--cc=christian.koenig@amd.com \
--cc=conor+dt@kernel.org \
--cc=daniel@ffwll.ch \
--cc=devicetree@vger.kernel.org \
--cc=dri-devel@lists.freedesktop.org \
--cc=heiko@sntech.de \
--cc=jack.zhu@starfivetech.com \
--cc=jagan@edgeble.ai \
--cc=keith.zhao@starfivetech.com \
--cc=kernel@esmil.dk \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linaro-mm-sig@lists.linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-media@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=maarten.lankhorst@linux.intel.com \
--cc=macromorgan@hotmail.com \
--cc=mripard@kernel.org \
--cc=p.zabel@pengutronix.de \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=shawnguo@kernel.org \
--cc=shengyang.chen@starfivetech.com \
--cc=sumit.semwal@linaro.org \
--cc=tzimmermann@suse.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).