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From: Atish Patra <atish.patra@wdc.com>
To: Anup Patel <anup@brainfault.org>,
	Palmer Dabbelt <palmer@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoph Hellwig <hch@infradead.org>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 3/4] irqchip: sifive-plic: Differentiate between PLIC handler and context
Date: Thu, 29 Nov 2018 17:57:36 -0800	[thread overview]
Message-ID: <93356e4f-ccd9-39ba-6afe-88dcdc72945d@wdc.com> (raw)
In-Reply-To: <20181127100317.12809-4-anup@brainfault.org>

On 11/27/18 2:04 AM, Anup Patel wrote:
> We explicitly differentiate between PLIC handler and context because
> PLIC context is for given mode of HART whereas PLIC handler is per-CPU
> software construct meant for handling interrupts from a particular
> PLIC context.
> 
> Signed-off-by: Anup Patel <anup@brainfault.org>
> ---
>   drivers/irqchip/irq-sifive-plic.c | 21 +++++++++++++--------
>   1 file changed, 13 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
> index 95b4b92ca9b8..ffd4deaca057 100644
> --- a/drivers/irqchip/irq-sifive-plic.c
> +++ b/drivers/irqchip/irq-sifive-plic.c
> @@ -66,8 +66,8 @@ static DEFINE_PER_CPU(struct plic_handler, plic_handlers);
>   
>   struct plic_hw {
>   	u32			nr_irqs;
> +	u32			nr_contexts;
>   	u32			nr_handlers;
> -	u32			nr_mapped;
>   	void __iomem		*regs;
>   	struct irq_domain	*irqdomain;
>   };
> @@ -191,10 +191,10 @@ static int __init plic_init(struct device_node *node,
>   	if (WARN_ON(!plic.nr_irqs))
>   		goto out_iounmap;
>   
> -	plic.nr_handlers = of_irq_count(node);
> -	if (WARN_ON(!plic.nr_handlers))
> +	plic.nr_contexts = of_irq_count(node);
> +	if (WARN_ON(!plic.nr_contexts))
>   		goto out_iounmap;
> -	if (WARN_ON(plic.nr_handlers < num_possible_cpus()))
> +	if (WARN_ON(plic.nr_contexts < num_possible_cpus()))
>   		goto out_iounmap;
>   
>   	plic.irqdomain = irq_domain_add_linear(node, plic.nr_irqs + 1,
> @@ -202,7 +202,7 @@ static int __init plic_init(struct device_node *node,
>   	if (WARN_ON(!plic.irqdomain))
>   		goto out_iounmap;
>   
> -	for (i = 0; i < plic.nr_handlers; i++) {
> +	for (i = 0; i < plic.nr_contexts; i++) {
>   		struct of_phandle_args parent;
>   		struct plic_handler *handler;
>   		irq_hw_number_t hwirq;
> @@ -225,6 +225,11 @@ static int __init plic_init(struct device_node *node,
>   
>   		cpu = riscv_hartid_to_cpuid(hartid);
>   		handler = per_cpu_ptr(&plic_handlers, cpu);
> +		if (handler->present) {
> +			pr_warn("handler not available for context %d.\n", i);
> +			continue;
> +		}
> +

Ahh you have the handler->present check here in this patch. This should 
be in the 2nd patch. This change doesn't match the commit text anyways.

Everything else just variable renaming which can be separated.
nr_handlers->nr_contexts
nr_mapped->nr_handlers


Regards,
Atish
>   		handler->present = true;
>   		handler->hart_base =
>   			plic.regs + CONTEXT_BASE + i * CONTEXT_PER_HART;
> @@ -237,11 +242,11 @@ static int __init plic_init(struct device_node *node,
>   		for (hwirq = 1; hwirq <= plic.nr_irqs; hwirq++)
>   			plic_toggle(handler, hwirq, 0);
>   
> -		plic.nr_mapped++;
> +		plic.nr_handlers++;
>   	}
>   
> -	pr_info("mapped %d interrupts to %d (out of %d) handlers.\n",
> -		plic.nr_irqs, plic.nr_mapped, plic.nr_handlers);
> +	pr_info("mapped %d interrupts with %d handlers for %d contexts.\n",
> +		plic.nr_irqs, plic.nr_handlers, plic.nr_contexts);
>   	set_handle_irq(plic_handle_irq);
>   	return 0;
>   
> 


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  parent reply	other threads:[~2018-11-30  1:57 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-27 10:03 [PATCH v2 0/4] IRQ affinity support in PLIC driver Anup Patel
2018-11-27 10:03 ` Anup Patel
2018-11-27 10:03 ` [PATCH v2 1/4] irqchip: sifive-plic: Pre-compute context hart base and enable base Anup Patel
2018-11-27 10:03   ` Anup Patel
2018-11-30  0:35   ` Atish Patra
2018-11-30  3:34     ` Anup Patel
2018-11-27 10:03 ` [PATCH v2 2/4] irqchip: sifive-plic: More flexible plic_irq_toggle() Anup Patel
2018-11-27 10:03   ` Anup Patel
2018-11-30  1:39   ` Atish Patra
2018-11-30  3:51     ` Anup Patel
2018-11-27 10:03 ` [PATCH v2 3/4] irqchip: sifive-plic: Differentiate between PLIC handler and context Anup Patel
2018-11-27 10:03   ` Anup Patel
2018-11-30  1:57   ` Atish Patra [this message]
2018-11-30  3:55     ` Anup Patel
2018-11-27 10:03 ` [PATCH v2 4/4] irqchip: sifive-plic: Implement irq_set_affinity() for SMP host Anup Patel
2018-11-27 10:03   ` Anup Patel
2018-11-30  5:59   ` Atish Patra
2018-11-30  7:51     ` Anup Patel
2018-11-30  7:54     ` Atish Patra

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