From: Anup Patel <anup@brainfault.org>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Palmer Dabbelt <palmer@rivosinc.com>,
Atish Patra <atishp@atishpatra.org>,
Atish Patra <atishp@rivosinc.com>,
Andrew Jones <ajones@ventanamicro.com>,
KVM General <kvm@vger.kernel.org>,
"open list:KERNEL VIRTUAL MACHINE FOR RISC-V (KVM/riscv)"
<kvm-riscv@lists.infradead.org>,
linux-riscv <linux-riscv@lists.infradead.org>
Subject: [GIT PULL] KVM/riscv changes for 6.5
Date: Thu, 22 Jun 2023 19:43:17 +0530 [thread overview]
Message-ID: <CAAhSdy1iT=SbjSvv_7SDygSo0HhmgLjD-y+DU1_Q+6tnki7w+A@mail.gmail.com> (raw)
Hi Paolo,
We have the following KVM RISC-V changes for 6.5:
1) Redirect AMO load/store misaligned traps to KVM guest
2) Trap-n-emulate AIA in-kernel irqchip for KVM guest
3) Svnapot support for KVM Guest
Please pull.
Please note that there is a minor conflict with the RISC-V
tree in the arch/riscv/include/uapi/asm/kvm.h header due to
KVM vector virtualization going through the RISC-V tree.
Regards,
Anup
The following changes since commit 9561de3a55bed6bdd44a12820ba81ec416e705a7:
Linux 6.4-rc5 (2023-06-04 14:04:27 -0400)
are available in the Git repository at:
https://github.com/kvm-riscv/linux.git tags/kvm-riscv-6.5-1
for you to fetch changes up to 07f225b5842420ae9c18cba17873fc71ed69c28e:
RISC-V: KVM: Remove unneeded semicolon (2023-06-20 10:48:38 +0530)
----------------------------------------------------------------
KVM/riscv changes for 6.5
- Redirect AMO load/store misaligned traps to KVM guest
- Trap-n-emulate AIA in-kernel irqchip for KVM guest
- Svnapot support for KVM Guest
----------------------------------------------------------------
Andrew Jones (3):
RISC-V: KVM: Rename dis_idx to ext_idx
RISC-V: KVM: Convert extension_disabled[] to ext_status[]
RISC-V: KVM: Probe for SBI extension status
Anup Patel (11):
RISC-V: KVM: Implement guest external interrupt line management
RISC-V: KVM: Add IMSIC related defines
RISC-V: KVM: Add APLIC related defines
RISC-V: KVM: Set kvm_riscv_aia_nr_hgei to zero
RISC-V: KVM: Skeletal in-kernel AIA irqchip support
RISC-V: KVM: Implement device interface for AIA irqchip
RISC-V: KVM: Add in-kernel emulation of AIA APLIC
RISC-V: KVM: Expose APLIC registers as attributes of AIA irqchip
RISC-V: KVM: Add in-kernel virtualization of AIA IMSIC
RISC-V: KVM: Expose IMSIC registers as attributes of AIA irqchip
RISC-V: KVM: Allow Svnapot extension for Guest/VM
Ben Dooks (1):
riscv: kvm: define vcpu_sbi_ext_pmu in header
Yang Li (1):
RISC-V: KVM: Remove unneeded semicolon
Ye Xingchen (1):
RISC-V: KVM: use bitmap_zero() API
wchen (1):
RISC-V: KVM: Redirect AMO load/store misaligned traps to guest
arch/riscv/include/asm/csr.h | 2 +
arch/riscv/include/asm/kvm_aia.h | 107 +++-
arch/riscv/include/asm/kvm_aia_aplic.h | 58 ++
arch/riscv/include/asm/kvm_aia_imsic.h | 38 ++
arch/riscv/include/asm/kvm_host.h | 4 +
arch/riscv/include/asm/kvm_vcpu_sbi.h | 11 +-
arch/riscv/include/uapi/asm/kvm.h | 73 +++
arch/riscv/kvm/Kconfig | 4 +
arch/riscv/kvm/Makefile | 3 +
arch/riscv/kvm/aia.c | 274 +++++++-
arch/riscv/kvm/aia_aplic.c | 619 ++++++++++++++++++
arch/riscv/kvm/aia_device.c | 673 ++++++++++++++++++++
arch/riscv/kvm/aia_imsic.c | 1084 ++++++++++++++++++++++++++++++++
arch/riscv/kvm/main.c | 3 +-
arch/riscv/kvm/tlb.c | 2 +-
arch/riscv/kvm/vcpu.c | 4 +
arch/riscv/kvm/vcpu_exit.c | 2 +
arch/riscv/kvm/vcpu_sbi.c | 80 ++-
arch/riscv/kvm/vm.c | 118 ++++
include/uapi/linux/kvm.h | 2 +
20 files changed, 3100 insertions(+), 61 deletions(-)
create mode 100644 arch/riscv/include/asm/kvm_aia_aplic.h
create mode 100644 arch/riscv/include/asm/kvm_aia_imsic.h
create mode 100644 arch/riscv/kvm/aia_aplic.c
create mode 100644 arch/riscv/kvm/aia_device.c
create mode 100644 arch/riscv/kvm/aia_imsic.c
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next reply other threads:[~2023-06-22 14:13 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-22 14:13 Anup Patel [this message]
2023-07-01 11:04 ` [GIT PULL] KVM/riscv changes for 6.5 Paolo Bonzini
2023-07-01 11:37 ` Anup Patel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CAAhSdy1iT=SbjSvv_7SDygSo0HhmgLjD-y+DU1_Q+6tnki7w+A@mail.gmail.com' \
--to=anup@brainfault.org \
--cc=ajones@ventanamicro.com \
--cc=atishp@atishpatra.org \
--cc=atishp@rivosinc.com \
--cc=kvm-riscv@lists.infradead.org \
--cc=kvm@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=palmer@rivosinc.com \
--cc=pbonzini@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).