Re: Errors and segmentation fault while building Golang on Kernel after v5.4-rc3

[Carlos Eduardo de Paula <me@carlosedp.com>]

My board is running:

SiFive FSBL:       2018-03-20
OpenSBI v0.5-44-g049ad0b
U-Boot 2020.01-dirty (Jan 08 2020 - 18:05:52 -0200)

All build on january 8 using the guide I've wrote here
(https://github.com/carlosedp/riscv-bringup/tree/master/unleashed)
after our talks.

Haven't tested newer versions on Qemu, might build it to give a try. I
have v5.4-rc3 built for Qemu and it works fine.

Carlos

On Fri, Jan 31, 2020 at 10:32 AM David Abdurachmanov
<david.abdurachmanov@gmail.com> wrote:
>
> On Fri, Jan 31, 2020 at 2:14 PM Carlos Eduardo de Paula
> <me@carlosedp.com> wrote:
> >
> > Golang has been recently upstreamed and I've been building multiple
> > versions on my Unleashed board successfully with kernel 5.3-rc4 and
> > previous.
> >
> > I noticed that after I updated my Kernel from v5.3-rc4 to v5.5-rc5,
> > Golang doesn't build anymore failing on multiple points and
> > segfaulting as well.
>
> Could you also mention what version of OpenSBI you use?
> Does it also fail on QEMU (avoid 4.2.0) or only on Unleashed?
>
> >
> > I've captured a few logs with the error building here:
> >
> > I've bisected the versions between v5.4-rc3 and v5.4 and it pointed
> > out that the commit below is the starting point.
> >
> > eb93685847a9055283d05951c1b205e737f38533 is the first bad commit
> > commit eb93685847a9055283d05951c1b205e737f38533
> > Author: Paul Walmsley <paul.walmsley@sifive.com>
> > Date: Wed Aug 7 19:07:34 2019 -0700
> >
> > riscv: fix flush_tlb_range() end address for flush_tlb_page()
> >
> > The RISC-V kernel implementation of flush_tlb_page() when CONFIG_SMP
> > is set is wrong. It passes zero to flush_tlb_range() as the final
> > address to flush, but it should be at least 'addr'.
> >
> > Some other Linux architecture ports use the beginning address to
> > flush, plus PAGE_SIZE, as the final address to flush. This might
> > flush slightly more than what's needed, but it seems unlikely that
> > being more clever would improve anything. So let's just take that
> > implementation for now.
> >
> > While here, convert the macro into a static inline function, primarily
> > to avoid unintentional multiple evaluations of 'addr'.
> >
> > This second version of the patch fixes a coding style issue found by
> > Christoph Hellwig <hch@lst.de>.
> >
> > Reported-by: Andreas Schwab <schwab@suse.de>
> > Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
> > Reviewed-by: Christoph Hellwig <hch@lst.de>
> >
> > :040000 040000 1a4ee20b3614c93de2a925bba2df6f2e1518f227
> > 6b4ffd3e1a2245912cf734a8a3f61db7eb0ccd67 M arch
> >
> > > git bisect visualize
> > eb93685 N 6 months ago Paul ..riscv: fix flush_tlb_range() end address
> > for flush_tlb_page() HEAD, refs/bisect/bad
> >
> >
> > > git diff eb93685^!
> >
> > ```diff
> > diff --git a/arch/riscv/include/asm/tlbflush.h
> > b/arch/riscv/include/asm/tlbflush.h
> > index 687dd19..4d9bbe8 100644
> > --- a/arch/riscv/include/asm/tlbflush.h
> > +++ b/arch/riscv/include/asm/tlbflush.h
> > @@ -53,10 +53,17 @@ static inline void remote_sfence_vma(struct
> > cpumask *cmask, unsigned long start,
> > }
> >
> > #define flush_tlb_all() sbi_remote_sfence_vma(NULL, 0, -1)
> > -#define flush_tlb_page(vma, addr) flush_tlb_range(vma, addr, 0)
> > +
> > #define flush_tlb_range(vma, start, end) \
> > remote_sfence_vma(mm_cpumask((vma)->vm_mm), start, (end) - (start))
> > -#define flush_tlb_mm(mm) \
> > +
> > +static inline void flush_tlb_page(struct vm_area_struct *vma,
> > + unsigned long addr)
> > +{
> > + flush_tlb_range(vma, addr, addr + PAGE_SIZE);
> > +}
> > +
> > +#define flush_tlb_mm(mm) \
> > remote_sfence_vma(mm_cpumask(mm), 0, -1)
> >
> > #endif /* CONFIG_SMP */
> > ```
> >
> > I was not able to revert this change from recent v5.5.0 so I don't
> > know if this is the problem or some close commits:
> >
> > > git log 2b245b8b..2f478b60 |grep riscv
> > 2f478b6 N 6 months ago Linus..Merge tag 'riscv/for-v5.3-rc5' of
> > git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
> > 69703eb N 6 months ago Vince..riscv: Make __fstate_clean() work correctly.
> > 8ac71d7 N 6 months ago Vince..riscv: Correct the initialized flow of FP register
> > eb93685 N 6 months ago Paul ..riscv: fix flush_tlb_range() end address
> > for flush_tlb_page()
> >
> > Carlos
> > --
> > ________________________________________
> > Carlos Eduardo de Paula
> > me@carlosedp.com
> > http://carlosedp.com
> > http://twitter.com/carlosedp
> > Linkedin
> > ________________________________________
> >
>


-- 
________________________________________
Carlos Eduardo de Paula
me@carlosedp.com
http://carlosedp.com
http://twitter.com/carlosedp
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