From: Sagar Kadam <sagar.kadam@openfive.com>
To: Stephen Boyd <sboyd@kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-pwm@vger.kernel.org" <linux-pwm@vger.kernel.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>
Cc: "aou@eecs.berkeley.edu" <aou@eecs.berkeley.edu>,
"jason@lakedaemon.net" <jason@lakedaemon.net>,
"maz@kernel.org" <maz@kernel.org>,
"mturquette@baylibre.com" <mturquette@baylibre.com>,
"u.kleine-koenig@pengutronix.de" <u.kleine-koenig@pengutronix.de>,
Yash Shah <yash.shah@openfive.com>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"palmer@dabbelt.com" <palmer@dabbelt.com>,
"Paul Walmsley \( Sifive\)" <paul.walmsley@sifive.com>,
"thierry.reding@gmail.com" <thierry.reding@gmail.com>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"lee.jones@linaro.org" <lee.jones@linaro.org>
Subject: RE: [PATCH v1 1/3] dt-bindings: fu540: prci: convert PRCI bindings to json-schema
Date: Tue, 15 Sep 2020 16:08:38 +0000 [thread overview]
Message-ID: <DM6PR13MB3451EE4E239C49BD9E7F032897200@DM6PR13MB3451.namprd13.prod.outlook.com> (raw)
In-Reply-To: <160012842007.4188128.14895985041717484631@swboyd.mtv.corp.google.com>
Hello Stephen,
> -----Original Message-----
> From: Stephen Boyd <sboyd@kernel.org>
> Sent: Tuesday, September 15, 2020 5:37 AM
> To: Sagar Kadam <sagar.kadam@openfive.com>;
> devicetree@vger.kernel.org; linux-clk@vger.kernel.org; linux-
> kernel@vger.kernel.org; linux-pwm@vger.kernel.org; linux-
> riscv@lists.infradead.org
> Cc: mturquette@baylibre.com; robh+dt@kernel.org; Paul Walmsley ( Sifive)
> <paul.walmsley@sifive.com>; palmer@dabbelt.com; tglx@linutronix.de;
> jason@lakedaemon.net; maz@kernel.org; thierry.reding@gmail.com;
> u.kleine-koenig@pengutronix.de; lee.jones@linaro.org;
> aou@eecs.berkeley.edu; Yash Shah <yash.shah@openfive.com>; Sagar
> Kadam <sagar.kadam@openfive.com>
> Subject: Re: [PATCH v1 1/3] dt-bindings: fu540: prci: convert PRCI bindings
> to json-schema
>
> [External Email] Do not click links or attachments unless you recognize the
> sender and know the content is safe
>
> Quoting Sagar Kadam (2020-09-10 03:44:02)
> > diff --git
> > a/Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml
> > b/Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml
> > new file mode 100644
> > index 0000000..49386cd
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml
> > @@ -0,0 +1,75 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) # Copyright
> > +(C) 2020 SiFive, Inc.
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/clock/sifive/fu540-prci.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: SiFive FU540 Power Reset Clock Interrupt Controller (PRCI)
> > +
> > +maintainers:
> > + - Sagar Kadam <sagar.kadam@sifive.com>
> > + - Paul Walmsley <paul.walmsley@sifive.com>
> > +
> > +description:
> > + On the FU540 family of SoCs, most system-wide clock and reset
> > +integration
> > + is via the PRCI IP block.
> > + The clock consumer should specify the desired clock via the clock
> > +ID
> > + macros defined in include/dt-bindings/clock/sifive-fu540-prci.h.
> > + These macros begin with PRCI_CLK_.
> > +
> > + The hfclk and rtcclk nodes are required, and represent physical
> > + crystals or resonators located on the PCB. These nodes should be
> > + present underneath /, rather than /soc.
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - sifive,fu540-c000-prci
> > + description:
> > + Should have "sifive,<soc>-prci", only one value is supported
>
> Drop description and have
>
> compatible:
> const: sifive,fu540-c000-prci
>
Thank you for suggestion here, I will remove this.
> > +
> > + reg:
> > + maxItems: 1
> > + description: Describe the PRCI's register target physical address
> > + region
>
> Drop description.
>
Okay.
> > +
> > + clocks:
> > + description:
> > + Should point to the hfclk device tree node and the rtcclk device tree
> node.
>
> s/device tree node//g
Okay, will remove these.
>
> > + The RTC clock here is not a time-of-day clock, but is instead a high-
> stability
> > + clock source for system timers and cycle counters.
>
> Better to have:
>
> clocks:
> items:
> - const: high frequency clock
> - const: RTC clock
>
> Can you add clock-names too? Making it optional is OK.
Okay, I will include these optional properties as
-const: "hfclk"
-const: "rtcclk"
>
> > + "#clock-cells":
> > + const: 1
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - clocks
> > + - "#clock-cells"
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + //hfclk and rtcclk present under /, in PCB-specific DT data
> > + hfclk: hfclk {
> > + #clock-cells = <0>;
> > + compatible = "fixed-clock";
> > + clock-frequency = <33333333>;
> > + clock-output-names = "hfclk";
> > + };
>
> Add a newline here?
>
Okay.
> > + rtcclk: rtcclk {
> > + #clock-cells = <0>;
> > + compatible = "fixed-clock";
> > + clock-frequency = <1000000>;
> > + clock-output-names = "rtcclk";
> > + };
>
> These may not be necessary either, just have the clock-controller node
> reference phandles?
>
Okay.
> > +
> > + //under /soc, in SoC-specific DT data
>
> Don't think this comment is necessary.
>
Okay.
Thanks & BR,
Sagar
> > + prci: clock-controller@10000000 {
> > + compatible = "sifive,fu540-c000-prci";
> > + reg = <0x10000000 0x1000>;
> > + clocks = <&hfclk>, <&rtcclk>;
> > + #clock-cells = <1>;
> > + };
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2020-09-15 16:09 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-10 10:44 [PATCH v1 0/3] convert sifive's prci, plic and pwm bindings to yaml Sagar Kadam
2020-09-10 10:44 ` [PATCH v1 1/3] dt-bindings: fu540: prci: convert PRCI bindings to json-schema Sagar Kadam
2020-09-15 0:07 ` Stephen Boyd
2020-09-15 16:08 ` Sagar Kadam [this message]
2020-09-10 10:44 ` [PATCH v1 2/3] dt-bindings: riscv: convert plic " Sagar Kadam
2020-09-22 20:34 ` Rob Herring
2020-09-23 17:33 ` Sagar Kadam
2021-03-22 15:38 ` Geert Uytterhoeven
2021-03-22 17:36 ` Rob Herring
2020-09-10 10:44 ` [PATCH v1 3/3] dt-bindings: riscv: convert pwm " Sagar Kadam
2020-09-22 20:37 ` Rob Herring
2020-09-26 4:51 ` Sagar Kadam
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=DM6PR13MB3451EE4E239C49BD9E7F032897200@DM6PR13MB3451.namprd13.prod.outlook.com \
--to=sagar.kadam@openfive.com \
--cc=aou@eecs.berkeley.edu \
--cc=devicetree@vger.kernel.org \
--cc=jason@lakedaemon.net \
--cc=lee.jones@linaro.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pwm@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=maz@kernel.org \
--cc=mturquette@baylibre.com \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=tglx@linutronix.de \
--cc=thierry.reding@gmail.com \
--cc=u.kleine-koenig@pengutronix.de \
--cc=yash.shah@openfive.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).