From: Conor Dooley <conor.dooley@microchip.com>
To: Samuel Holland <samuel@sholland.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
<linux-riscv@lists.infradead.org>,
Albert Ou <aou@eecs.berkeley.edu>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@rivosinc.com>, Dao Lu <daolu@rivosinc.com>,
Guo Ren <guoren@kernel.org>, Heiko Stuebner <heiko@sntech.de>,
Jisheng Zhang <jszhang@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] riscv: Fix build with CONFIG_CC_OPTIMIZE_FOR_SIZE=y
Date: Thu, 22 Sep 2022 14:25:15 +0100 [thread overview]
Message-ID: <YyxiO0OHvloqJEK6@wendy> (raw)
In-Reply-To: <20220922060958.44203-1-samuel@sholland.org>
On Thu, Sep 22, 2022 at 01:09:58AM -0500, Samuel Holland wrote:
> commit 8eb060e10185 ("arch/riscv: add Zihintpause support") broke
> building with CONFIG_CC_OPTIMIZE_FOR_SIZE enabled (gcc 11.1.0):
clang-15 chucks a fit too..
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
>
> CC arch/riscv/kernel/vdso/vgettimeofday.o
> In file included from <command-line>:
> ./arch/riscv/include/asm/jump_label.h: In function 'cpu_relax':
> ././include/linux/compiler_types.h:285:33: warning: 'asm' operand 0 probably does not match constraints
> 285 | #define asm_volatile_goto(x...) asm goto(x)
> | ^~~
> ./arch/riscv/include/asm/jump_label.h:41:9: note: in expansion of macro 'asm_volatile_goto'
> 41 | asm_volatile_goto(
> | ^~~~~~~~~~~~~~~~~
> ././include/linux/compiler_types.h:285:33: error: impossible constraint in 'asm'
> 285 | #define asm_volatile_goto(x...) asm goto(x)
> | ^~~
> ./arch/riscv/include/asm/jump_label.h:41:9: note: in expansion of macro 'asm_volatile_goto'
> 41 | asm_volatile_goto(
> | ^~~~~~~~~~~~~~~~~
> make[1]: *** [scripts/Makefile.build:249: arch/riscv/kernel/vdso/vgettimeofday.o] Error 1
> make: *** [arch/riscv/Makefile:128: vdso_prepare] Error 2
>
> Having a static branch in cpu_relax() is problematic because that
> function is widely inlined, including in some quite complex functions
> like in the VDSO. A quick measurement shows this static branch is
> responsible by itself for around 40% of the jump table.
>
> Drop the static branch, which ends up being the same number of
> instructions anyway. If Zihintpause is supported, we trade the nop from
> the static branch for a div. If Zihintpause is unsupported, we trade the
> jump from the static branch for (what gets interpreted as) a nop.
>
> Fixes: 8eb060e10185 ("arch/riscv: add Zihintpause support")
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
>
> arch/riscv/include/asm/hwcap.h | 3 ---
> arch/riscv/include/asm/vdso/processor.h | 25 ++++++++++---------------
> 2 files changed, 10 insertions(+), 18 deletions(-)
>
> diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h
> index 6f59ec64175e..b21d46e68386 100644
> --- a/arch/riscv/include/asm/hwcap.h
> +++ b/arch/riscv/include/asm/hwcap.h
> @@ -68,7 +68,6 @@ enum riscv_isa_ext_id {
> */
> enum riscv_isa_ext_key {
> RISCV_ISA_EXT_KEY_FPU, /* For 'F' and 'D' */
> - RISCV_ISA_EXT_KEY_ZIHINTPAUSE,
> RISCV_ISA_EXT_KEY_MAX,
> };
>
> @@ -88,8 +87,6 @@ static __always_inline int riscv_isa_ext2key(int num)
> return RISCV_ISA_EXT_KEY_FPU;
> case RISCV_ISA_EXT_d:
> return RISCV_ISA_EXT_KEY_FPU;
> - case RISCV_ISA_EXT_ZIHINTPAUSE:
> - return RISCV_ISA_EXT_KEY_ZIHINTPAUSE;
> default:
> return -EINVAL;
> }
> diff --git a/arch/riscv/include/asm/vdso/processor.h b/arch/riscv/include/asm/vdso/processor.h
> index 1e4f8b4aef79..789bdb8211a2 100644
> --- a/arch/riscv/include/asm/vdso/processor.h
> +++ b/arch/riscv/include/asm/vdso/processor.h
> @@ -4,30 +4,25 @@
>
> #ifndef __ASSEMBLY__
>
> -#include <linux/jump_label.h>
> #include <asm/barrier.h>
> -#include <asm/hwcap.h>
>
> static inline void cpu_relax(void)
> {
> - if (!static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_ZIHINTPAUSE])) {
> #ifdef __riscv_muldiv
> - int dummy;
> - /* In lieu of a halt instruction, induce a long-latency stall. */
> - __asm__ __volatile__ ("div %0, %0, zero" : "=r" (dummy));
> + int dummy;
> + /* In lieu of a halt instruction, induce a long-latency stall. */
> + __asm__ __volatile__ ("div %0, %0, zero" : "=r" (dummy));
> #endif
> - } else {
> - /*
> - * Reduce instruction retirement.
> - * This assumes the PC changes.
> - */
> + /*
> + * Reduce instruction retirement.
> + * This assumes the PC changes.
> + */
> #ifdef __riscv_zihintpause
> - __asm__ __volatile__ ("pause");
> + __asm__ __volatile__ ("pause");
> #else
> - /* Encoding of the pause instruction */
> - __asm__ __volatile__ (".4byte 0x100000F");
> + /* Encoding of the pause instruction */
> + __asm__ __volatile__ (".4byte 0x100000F");
> #endif
> - }
> barrier();
> }
>
> --
> 2.35.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-09-22 13:25 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-22 6:09 [PATCH] riscv: Fix build with CONFIG_CC_OPTIMIZE_FOR_SIZE=y Samuel Holland
2022-09-22 13:25 ` Conor Dooley [this message]
2022-09-22 15:45 ` Heiko Stuebner
2022-09-22 15:52 ` Jessica Clarke
2022-09-23 7:17 ` Heiko Stuebner
2022-09-23 18:01 ` Atish Patra
2022-09-24 23:15 ` Conor Dooley
2022-09-28 7:21 ` Atish Patra
2022-09-28 21:16 ` Conor Dooley
2022-09-29 3:26 ` Atish Patra
2022-10-01 20:13 ` Conor Dooley
2022-10-04 16:52 ` Atish Patra
2022-10-04 17:15 ` Conor Dooley
2022-10-04 17:24 ` Jessica Clarke
2022-10-05 0:38 ` Guo Ren
2022-10-05 1:01 ` Jessica Clarke
2022-10-05 1:40 ` Guo Ren
2022-10-05 14:25 ` Jessica Clarke
2022-10-06 6:48 ` Jisheng Zhang
2022-10-26 13:59 ` Palmer Dabbelt
2023-02-01 7:21 ` Palmer Dabbelt
2023-02-02 16:25 ` Jisheng Zhang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=YyxiO0OHvloqJEK6@wendy \
--to=conor.dooley@microchip.com \
--cc=anup@brainfault.org \
--cc=aou@eecs.berkeley.edu \
--cc=atishp@rivosinc.com \
--cc=daolu@rivosinc.com \
--cc=guoren@kernel.org \
--cc=heiko@sntech.de \
--cc=jszhang@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=samuel@sholland.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).