From: Paul Walmsley <paul.walmsley@sifive.com>
To: Rob Herring <robh@kernel.org>
Cc: linux-riscv@lists.infradead.org,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] dt-bindings: riscv: resolve 'make dt_binding_check' warnings
Date: Wed, 26 Jun 2019 14:01:23 -0700 (PDT) [thread overview]
Message-ID: <alpine.DEB.2.21.9999.1906261358440.23534@viisi.sifive.com> (raw)
In-Reply-To: <alpine.DEB.2.21.9999.1906261325290.23534@viisi.sifive.com>
On Wed, 26 Jun 2019, Paul Walmsley wrote:
> On Wed, 26 Jun 2019, Rob Herring wrote:
>
> > On Wed, Jun 26, 2019 at 9:30 AM Paul Walmsley <paul.walmsley@sifive.com> wrote:
> > >
> > > Rob pointed out that one of the examples in the RISC-V 'cpus' YAML schema
> > > results in warnings from 'make dt_binding_check'. Fix these.
> > >
> > > While here, make the whitespace in the second example consistent with the
> > > first example.
> > >
> > > Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
> > > Cc: Rob Herring <robh@kernel.org>
> > > ---
> > > .../devicetree/bindings/riscv/cpus.yaml | 26 ++++++++++---------
> > > 1 file changed, 14 insertions(+), 12 deletions(-)
> > >
> > > diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
> > > index 27f02ec4bb45..f97a4ecd7b91 100644
> > > --- a/Documentation/devicetree/bindings/riscv/cpus.yaml
> > > +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
> > > @@ -152,17 +152,19 @@ examples:
> > > - |
> > > // Example 2: Spike ISA Simulator with 1 Hart
> > > cpus {
> > > - cpu@0 {
> > > - device_type = "cpu";
> > > - reg = <0>;
> > > - compatible = "riscv";
> > > - riscv,isa = "rv64imafdc";
> > > - mmu-type = "riscv,sv48";
> > > - interrupt-controller {
> > > - #interrupt-cells = <1>;
> > > - interrupt-controller;
> > > - compatible = "riscv,cpu-intc";
> > > - };
> > > - };
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + cpu@0 {
> >
> > This only works because you removed 'cpus' and therefore none of this
> > schema is applied.
>
> I'm not following you - could you point out where "cpus" was removed?
If it helps, this patch is simply to fix the dtc warnings that you
mentioned in your post on devicetree-spec@. Without this patch, with
"make dtbs_check", the following warnings are generated:
DTC Documentation/devicetree/bindings/riscv/cpus.example.dtb
Documentation/devicetree/bindings/riscv/cpus.example.dts:75.25-35: Warning (reg_format): /example-1/cpus/cpu@0:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Documentation/devicetree/bindings/riscv/cpus.example.dtb: Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
Documentation/devicetree/bindings/riscv/cpus.example.dtb: Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
Documentation/devicetree/bindings/riscv/cpus.example.dtb: Warning (spi_bus_reg): Failed prerequisite 'reg_format'
Documentation/devicetree/bindings/riscv/cpus.example.dts:73.23-84.19: Warning (avoid_default_addr_size): /example-1/cpus/cpu@0: Relying on default #address-cells value
Documentation/devicetree/bindings/riscv/cpus.example.dts:73.23-84.19: Warning (avoid_default_addr_size): /example-1/cpus/cpu@0: Relying on default #size-cells value
When the patch is applied, dtc doesn't report any of these warnings.
Let me know if I'm missing something obvious.
- Paul
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next prev parent reply other threads:[~2019-06-26 21:01 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-26 15:30 [PATCH] dt-bindings: riscv: resolve 'make dt_binding_check' warnings Paul Walmsley
2019-06-26 17:52 ` Rob Herring
2019-06-26 20:27 ` Paul Walmsley
2019-06-26 21:01 ` Paul Walmsley [this message]
2019-06-26 21:13 ` Rob Herring
2019-06-26 21:23 ` Paul Walmsley
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