From: Zong Li <zong.li@sifive.com>
To: palmer@dabbelt.com, paul.walmsley@sifive.com,
aou@eecs.berkeley.edu, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: Zong Li <zong.li@sifive.com>
Subject: [PATCH v2 0/9] Support strict kernel memory permissions for security
Date: Mon, 9 Mar 2020 16:22:20 +0800 [thread overview]
Message-ID: <cover.1583741997.git.zong.li@sifive.com> (raw)
The main purpose of this patch series is changing the kernel mapping permission
, make sure that code is not writeable, data is not executable, and read-only
data is neither writable nor executable.
This patch series also supports the relevant implementations such as
ARCH_HAS_SET_MEMORY, ARCH_HAS_SET_DIRECT_MAP,
ARCH_SUPPORTS_DEBUG_PAGEALLOC and DEBUG_WX.
Changes in v2:
- Use _data to specify the start of data section with write permission.
- Change ftrace patch text implementaion.
- Separate DEBUG_WX patch to another patchset.
Zong Li (9):
riscv: add ARCH_HAS_SET_MEMORY support
riscv: add ARCH_HAS_SET_DIRECT_MAP support
riscv: add ARCH_SUPPORTS_DEBUG_PAGEALLOC support
riscv: move exception table immediately after RO_DATA
riscv: add alignment for text, rodata and data sections
riscv: add STRICT_KERNEL_RWX support
riscv: add macro to get instruction length
riscv: introduce interfaces to patch kernel code
riscv: patch code by fixmap mapping
arch/riscv/Kconfig | 6 +
arch/riscv/include/asm/bug.h | 8 ++
arch/riscv/include/asm/fixmap.h | 2 +
arch/riscv/include/asm/patch.h | 12 ++
arch/riscv/include/asm/set_memory.h | 41 ++++++
arch/riscv/kernel/Makefile | 4 +-
arch/riscv/kernel/ftrace.c | 13 +-
arch/riscv/kernel/patch.c | 124 ++++++++++++++++++
arch/riscv/kernel/traps.c | 3 +-
arch/riscv/kernel/vmlinux.lds.S | 11 +-
arch/riscv/mm/Makefile | 1 +
arch/riscv/mm/init.c | 45 +++++++
arch/riscv/mm/pageattr.c | 187 ++++++++++++++++++++++++++++
13 files changed, 443 insertions(+), 14 deletions(-)
create mode 100644 arch/riscv/include/asm/patch.h
create mode 100644 arch/riscv/include/asm/set_memory.h
create mode 100644 arch/riscv/kernel/patch.c
create mode 100644 arch/riscv/mm/pageattr.c
--
2.25.1
next reply other threads:[~2020-03-09 8:22 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-09 8:22 Zong Li [this message]
2020-03-09 8:22 ` [PATCH v2 1/9] riscv: add ARCH_HAS_SET_MEMORY support Zong Li
2020-03-09 12:50 ` kbuild test robot
2020-03-09 8:22 ` [PATCH v2 2/9] riscv: add ARCH_HAS_SET_DIRECT_MAP support Zong Li
2020-03-09 8:22 ` [PATCH v2 3/9] riscv: add ARCH_SUPPORTS_DEBUG_PAGEALLOC support Zong Li
2020-03-09 8:22 ` [PATCH v2 4/9] riscv: move exception table immediately after RO_DATA Zong Li
2020-03-09 8:22 ` [PATCH v2 5/9] riscv: add alignment for text, rodata and data sections Zong Li
2020-03-09 8:22 ` [PATCH v2 6/9] riscv: add STRICT_KERNEL_RWX support Zong Li
2020-03-09 13:13 ` kbuild test robot
2020-03-09 8:22 ` [PATCH v2 7/9] riscv: add macro to get instruction length Zong Li
2020-03-09 8:22 ` [PATCH v2 8/9] riscv: introduce interfaces to patch kernel code Zong Li
2020-03-09 12:49 ` kbuild test robot
2020-03-09 13:12 ` kbuild test robot
2020-03-09 8:22 ` [PATCH v2 9/9] riscv: patch code by fixmap mapping Zong Li
2020-03-09 8:33 ` [PATCH v2 0/9] Support strict kernel memory permissions for security Zong Li
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