From: Zhangjin Wu <falcon@tinylab.org>
To: thomas@t-8ch.de, w@1wt.eu
Cc: falcon@tinylab.org, arnd@arndb.de, david.laight@aculab.com,
linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: [PATCH v5 06/14] tools/nolibc: arch-*.h: clean up multiple whitespaces
Date: Wed, 28 Jun 2023 21:19:33 +0800 [thread overview]
Message-ID: <eb4c7a381cf856c9d8e7d679b28507a258cab26a.1687957589.git.falcon@tinylab.org> (raw)
In-Reply-To: <cover.1687957589.git.falcon@tinylab.org>
To align with Linux code style and let scripts/checkpatch.pl happy, the
multiple whitespaces in arch-<ARCH>.h files are cleaned up.
Most of them are modified by these commands automatically:
$ sed -i -e '/#define my_syscall/,/})/{s/ /\t/g}' tools/include/nolibc/arch-*.h
$ sed -i -e '/#define my_syscall/,/})/{s/ *\\$/\t\\/g}' tools/include/nolibc/arch-*.h
And checked with:
$ grep ' *\\$' tools/include/nolibc/arch-*.h
Besides, more multiple whitespaces are cleaned up:
- convert "__asm__ volatile" to "__asm__ volatile"
- "foo _num bar" should be "foo _num bar"
Signed-off-by: Zhangjin Wu <falcon@tinylab.org>
---
tools/include/nolibc/arch-aarch64.h | 210 +++++++++++-----------
tools/include/nolibc/arch-arm.h | 240 +++++++++++++-------------
tools/include/nolibc/arch-i386.h | 226 ++++++++++++------------
tools/include/nolibc/arch-loongarch.h | 222 ++++++++++++------------
tools/include/nolibc/arch-mips.h | 218 +++++++++++------------
tools/include/nolibc/arch-riscv.h | 208 +++++++++++-----------
tools/include/nolibc/arch-s390.h | 202 +++++++++++-----------
tools/include/nolibc/arch-x86_64.h | 222 ++++++++++++------------
8 files changed, 874 insertions(+), 874 deletions(-)
diff --git a/tools/include/nolibc/arch-aarch64.h b/tools/include/nolibc/arch-aarch64.h
index 11f294a406b7..e30056f996db 100644
--- a/tools/include/nolibc/arch-aarch64.h
+++ b/tools/include/nolibc/arch-aarch64.h
@@ -52,123 +52,123 @@ struct sys_stat_struct {
*/
#define __ARCH_WANT_SYS_PSELECT6
-#define my_syscall0(num) \
-({ \
- register long _num __asm__ ("x8") = (num); \
- register long _arg1 __asm__ ("x0"); \
- \
- __asm__ volatile ( \
- "svc #0\n" \
- : "=r"(_arg1) \
- : "r"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall0(num) \
+({ \
+ register long _num __asm__ ("x8") = (num); \
+ register long _arg1 __asm__ ("x0"); \
+ \
+ __asm__ volatile ( \
+ "svc #0\n" \
+ : "=r"(_arg1) \
+ : "r"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
-#define my_syscall1(num, arg1) \
-({ \
- register long _num __asm__ ("x8") = (num); \
- register long _arg1 __asm__ ("x0") = (long)(arg1); \
- \
- __asm__ volatile ( \
- "svc #0\n" \
- : "=r"(_arg1) \
- : "r"(_arg1), \
- "r"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall1(num, arg1) \
+({ \
+ register long _num __asm__ ("x8") = (num); \
+ register long _arg1 __asm__ ("x0") = (long)(arg1); \
+ \
+ __asm__ volatile ( \
+ "svc #0\n" \
+ : "=r"(_arg1) \
+ : "r"(_arg1), \
+ "r"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
-#define my_syscall2(num, arg1, arg2) \
-({ \
- register long _num __asm__ ("x8") = (num); \
- register long _arg1 __asm__ ("x0") = (long)(arg1); \
- register long _arg2 __asm__ ("x1") = (long)(arg2); \
- \
- __asm__ volatile ( \
- "svc #0\n" \
- : "=r"(_arg1) \
- : "r"(_arg1), "r"(_arg2), \
- "r"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall2(num, arg1, arg2) \
+({ \
+ register long _num __asm__ ("x8") = (num); \
+ register long _arg1 __asm__ ("x0") = (long)(arg1); \
+ register long _arg2 __asm__ ("x1") = (long)(arg2); \
+ \
+ __asm__ volatile ( \
+ "svc #0\n" \
+ : "=r"(_arg1) \
+ : "r"(_arg1), "r"(_arg2), \
+ "r"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
-#define my_syscall3(num, arg1, arg2, arg3) \
-({ \
- register long _num __asm__ ("x8") = (num); \
- register long _arg1 __asm__ ("x0") = (long)(arg1); \
- register long _arg2 __asm__ ("x1") = (long)(arg2); \
- register long _arg3 __asm__ ("x2") = (long)(arg3); \
- \
- __asm__ volatile ( \
- "svc #0\n" \
- : "=r"(_arg1) \
- : "r"(_arg1), "r"(_arg2), "r"(_arg3), \
- "r"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall3(num, arg1, arg2, arg3) \
+({ \
+ register long _num __asm__ ("x8") = (num); \
+ register long _arg1 __asm__ ("x0") = (long)(arg1); \
+ register long _arg2 __asm__ ("x1") = (long)(arg2); \
+ register long _arg3 __asm__ ("x2") = (long)(arg3); \
+ \
+ __asm__ volatile ( \
+ "svc #0\n" \
+ : "=r"(_arg1) \
+ : "r"(_arg1), "r"(_arg2), "r"(_arg3), \
+ "r"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
-#define my_syscall4(num, arg1, arg2, arg3, arg4) \
-({ \
- register long _num __asm__ ("x8") = (num); \
- register long _arg1 __asm__ ("x0") = (long)(arg1); \
- register long _arg2 __asm__ ("x1") = (long)(arg2); \
- register long _arg3 __asm__ ("x2") = (long)(arg3); \
- register long _arg4 __asm__ ("x3") = (long)(arg4); \
- \
- __asm__ volatile ( \
- "svc #0\n" \
- : "=r"(_arg1) \
- : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), \
- "r"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall4(num, arg1, arg2, arg3, arg4) \
+({ \
+ register long _num __asm__ ("x8") = (num); \
+ register long _arg1 __asm__ ("x0") = (long)(arg1); \
+ register long _arg2 __asm__ ("x1") = (long)(arg2); \
+ register long _arg3 __asm__ ("x2") = (long)(arg3); \
+ register long _arg4 __asm__ ("x3") = (long)(arg4); \
+ \
+ __asm__ volatile ( \
+ "svc #0\n" \
+ : "=r"(_arg1) \
+ : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), \
+ "r"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
-#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
-({ \
- register long _num __asm__ ("x8") = (num); \
- register long _arg1 __asm__ ("x0") = (long)(arg1); \
- register long _arg2 __asm__ ("x1") = (long)(arg2); \
- register long _arg3 __asm__ ("x2") = (long)(arg3); \
- register long _arg4 __asm__ ("x3") = (long)(arg4); \
- register long _arg5 __asm__ ("x4") = (long)(arg5); \
- \
- __asm__ volatile ( \
- "svc #0\n" \
- : "=r" (_arg1) \
- : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
- "r"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
+({ \
+ register long _num __asm__ ("x8") = (num); \
+ register long _arg1 __asm__ ("x0") = (long)(arg1); \
+ register long _arg2 __asm__ ("x1") = (long)(arg2); \
+ register long _arg3 __asm__ ("x2") = (long)(arg3); \
+ register long _arg4 __asm__ ("x3") = (long)(arg4); \
+ register long _arg5 __asm__ ("x4") = (long)(arg5); \
+ \
+ __asm__ volatile ( \
+ "svc #0\n" \
+ : "=r" (_arg1) \
+ : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
+ "r"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
-#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
-({ \
- register long _num __asm__ ("x8") = (num); \
- register long _arg1 __asm__ ("x0") = (long)(arg1); \
- register long _arg2 __asm__ ("x1") = (long)(arg2); \
- register long _arg3 __asm__ ("x2") = (long)(arg3); \
- register long _arg4 __asm__ ("x3") = (long)(arg4); \
- register long _arg5 __asm__ ("x4") = (long)(arg5); \
- register long _arg6 __asm__ ("x5") = (long)(arg6); \
- \
- __asm__ volatile ( \
- "svc #0\n" \
- : "=r" (_arg1) \
- : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
- "r"(_arg6), "r"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
+({ \
+ register long _num __asm__ ("x8") = (num); \
+ register long _arg1 __asm__ ("x0") = (long)(arg1); \
+ register long _arg2 __asm__ ("x1") = (long)(arg2); \
+ register long _arg3 __asm__ ("x2") = (long)(arg3); \
+ register long _arg4 __asm__ ("x3") = (long)(arg4); \
+ register long _arg5 __asm__ ("x4") = (long)(arg5); \
+ register long _arg6 __asm__ ("x5") = (long)(arg6); \
+ \
+ __asm__ volatile ( \
+ "svc #0\n" \
+ : "=r" (_arg1) \
+ : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
+ "r"(_arg6), "r"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
char **environ __attribute__((weak));
diff --git a/tools/include/nolibc/arch-arm.h b/tools/include/nolibc/arch-arm.h
index ca4c66987497..7a64290fc518 100644
--- a/tools/include/nolibc/arch-arm.h
+++ b/tools/include/nolibc/arch-arm.h
@@ -86,138 +86,138 @@ struct sys_stat_struct {
#endif /* end THUMB */
-#define my_syscall0(num) \
-({ \
- register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
- register long _arg1 __asm__ ("r0"); \
- \
- __asm__ volatile ( \
- _NOLIBC_THUMB_SET_R7 \
- "svc #0\n" \
- _NOLIBC_THUMB_RESTORE_R7 \
- : "=r"(_arg1), "=r"(_num) \
- : "r"(_arg1), \
- "r"(_num) \
- : "memory", "cc", "lr" \
- ); \
- _arg1; \
+#define my_syscall0(num) \
+({ \
+ register long _num __asm__ (_NOLIBC_SYSCALL_REG) = (num); \
+ register long _arg1 __asm__ ("r0"); \
+ \
+ __asm__ volatile ( \
+ _NOLIBC_THUMB_SET_R7 \
+ "svc #0\n" \
+ _NOLIBC_THUMB_RESTORE_R7 \
+ : "=r"(_arg1), "=r"(_num) \
+ : "r"(_arg1), \
+ "r"(_num) \
+ : "memory", "cc", "lr" \
+ ); \
+ _arg1; \
})
-#define my_syscall1(num, arg1) \
-({ \
- register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
- register long _arg1 __asm__ ("r0") = (long)(arg1); \
- \
- __asm__ volatile ( \
- _NOLIBC_THUMB_SET_R7 \
- "svc #0\n" \
- _NOLIBC_THUMB_RESTORE_R7 \
- : "=r"(_arg1), "=r" (_num) \
- : "r"(_arg1), \
- "r"(_num) \
- : "memory", "cc", "lr" \
- ); \
- _arg1; \
+#define my_syscall1(num, arg1) \
+({ \
+ register long _num __asm__ (_NOLIBC_SYSCALL_REG) = (num); \
+ register long _arg1 __asm__ ("r0") = (long)(arg1); \
+ \
+ __asm__ volatile ( \
+ _NOLIBC_THUMB_SET_R7 \
+ "svc #0\n" \
+ _NOLIBC_THUMB_RESTORE_R7 \
+ : "=r"(_arg1), "=r" (_num) \
+ : "r"(_arg1), \
+ "r"(_num) \
+ : "memory", "cc", "lr" \
+ ); \
+ _arg1; \
})
-#define my_syscall2(num, arg1, arg2) \
-({ \
- register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
- register long _arg1 __asm__ ("r0") = (long)(arg1); \
- register long _arg2 __asm__ ("r1") = (long)(arg2); \
- \
- __asm__ volatile ( \
- _NOLIBC_THUMB_SET_R7 \
- "svc #0\n" \
- _NOLIBC_THUMB_RESTORE_R7 \
- : "=r"(_arg1), "=r" (_num) \
- : "r"(_arg1), "r"(_arg2), \
- "r"(_num) \
- : "memory", "cc", "lr" \
- ); \
- _arg1; \
+#define my_syscall2(num, arg1, arg2) \
+({ \
+ register long _num __asm__ (_NOLIBC_SYSCALL_REG) = (num); \
+ register long _arg1 __asm__ ("r0") = (long)(arg1); \
+ register long _arg2 __asm__ ("r1") = (long)(arg2); \
+ \
+ __asm__ volatile ( \
+ _NOLIBC_THUMB_SET_R7 \
+ "svc #0\n" \
+ _NOLIBC_THUMB_RESTORE_R7 \
+ : "=r"(_arg1), "=r" (_num) \
+ : "r"(_arg1), "r"(_arg2), \
+ "r"(_num) \
+ : "memory", "cc", "lr" \
+ ); \
+ _arg1; \
})
-#define my_syscall3(num, arg1, arg2, arg3) \
-({ \
- register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
- register long _arg1 __asm__ ("r0") = (long)(arg1); \
- register long _arg2 __asm__ ("r1") = (long)(arg2); \
- register long _arg3 __asm__ ("r2") = (long)(arg3); \
- \
- __asm__ volatile ( \
- _NOLIBC_THUMB_SET_R7 \
- "svc #0\n" \
- _NOLIBC_THUMB_RESTORE_R7 \
- : "=r"(_arg1), "=r" (_num) \
- : "r"(_arg1), "r"(_arg2), "r"(_arg3), \
- "r"(_num) \
- : "memory", "cc", "lr" \
- ); \
- _arg1; \
+#define my_syscall3(num, arg1, arg2, arg3) \
+({ \
+ register long _num __asm__ (_NOLIBC_SYSCALL_REG) = (num); \
+ register long _arg1 __asm__ ("r0") = (long)(arg1); \
+ register long _arg2 __asm__ ("r1") = (long)(arg2); \
+ register long _arg3 __asm__ ("r2") = (long)(arg3); \
+ \
+ __asm__ volatile ( \
+ _NOLIBC_THUMB_SET_R7 \
+ "svc #0\n" \
+ _NOLIBC_THUMB_RESTORE_R7 \
+ : "=r"(_arg1), "=r" (_num) \
+ : "r"(_arg1), "r"(_arg2), "r"(_arg3), \
+ "r"(_num) \
+ : "memory", "cc", "lr" \
+ ); \
+ _arg1; \
})
-#define my_syscall4(num, arg1, arg2, arg3, arg4) \
-({ \
- register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
- register long _arg1 __asm__ ("r0") = (long)(arg1); \
- register long _arg2 __asm__ ("r1") = (long)(arg2); \
- register long _arg3 __asm__ ("r2") = (long)(arg3); \
- register long _arg4 __asm__ ("r3") = (long)(arg4); \
- \
- __asm__ volatile ( \
- _NOLIBC_THUMB_SET_R7 \
- "svc #0\n" \
- _NOLIBC_THUMB_RESTORE_R7 \
- : "=r"(_arg1), "=r" (_num) \
- : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), \
- "r"(_num) \
- : "memory", "cc", "lr" \
- ); \
- _arg1; \
+#define my_syscall4(num, arg1, arg2, arg3, arg4) \
+({ \
+ register long _num __asm__ (_NOLIBC_SYSCALL_REG) = (num); \
+ register long _arg1 __asm__ ("r0") = (long)(arg1); \
+ register long _arg2 __asm__ ("r1") = (long)(arg2); \
+ register long _arg3 __asm__ ("r2") = (long)(arg3); \
+ register long _arg4 __asm__ ("r3") = (long)(arg4); \
+ \
+ __asm__ volatile ( \
+ _NOLIBC_THUMB_SET_R7 \
+ "svc #0\n" \
+ _NOLIBC_THUMB_RESTORE_R7 \
+ : "=r"(_arg1), "=r" (_num) \
+ : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), \
+ "r"(_num) \
+ : "memory", "cc", "lr" \
+ ); \
+ _arg1; \
})
-#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
-({ \
- register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
- register long _arg1 __asm__ ("r0") = (long)(arg1); \
- register long _arg2 __asm__ ("r1") = (long)(arg2); \
- register long _arg3 __asm__ ("r2") = (long)(arg3); \
- register long _arg4 __asm__ ("r3") = (long)(arg4); \
- register long _arg5 __asm__ ("r4") = (long)(arg5); \
- \
- __asm__ volatile ( \
- _NOLIBC_THUMB_SET_R7 \
- "svc #0\n" \
- _NOLIBC_THUMB_RESTORE_R7 \
- : "=r"(_arg1), "=r" (_num) \
- : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
- "r"(_num) \
- : "memory", "cc", "lr" \
- ); \
- _arg1; \
+#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
+({ \
+ register long _num __asm__ (_NOLIBC_SYSCALL_REG) = (num); \
+ register long _arg1 __asm__ ("r0") = (long)(arg1); \
+ register long _arg2 __asm__ ("r1") = (long)(arg2); \
+ register long _arg3 __asm__ ("r2") = (long)(arg3); \
+ register long _arg4 __asm__ ("r3") = (long)(arg4); \
+ register long _arg5 __asm__ ("r4") = (long)(arg5); \
+ \
+ __asm__ volatile ( \
+ _NOLIBC_THUMB_SET_R7 \
+ "svc #0\n" \
+ _NOLIBC_THUMB_RESTORE_R7 \
+ : "=r"(_arg1), "=r" (_num) \
+ : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
+ "r"(_num) \
+ : "memory", "cc", "lr" \
+ ); \
+ _arg1; \
})
-#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
-({ \
- register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
- register long _arg1 __asm__ ("r0") = (long)(arg1); \
- register long _arg2 __asm__ ("r1") = (long)(arg2); \
- register long _arg3 __asm__ ("r2") = (long)(arg3); \
- register long _arg4 __asm__ ("r3") = (long)(arg4); \
- register long _arg5 __asm__ ("r4") = (long)(arg5); \
- register long _arg6 __asm__ ("r5") = (long)(arg6); \
- \
- __asm__ volatile ( \
- _NOLIBC_THUMB_SET_R7 \
- "svc #0\n" \
- _NOLIBC_THUMB_RESTORE_R7 \
- : "=r"(_arg1), "=r" (_num) \
- : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
- "r"(_arg6), "r"(_num) \
- : "memory", "cc", "lr" \
- ); \
- _arg1; \
+#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
+({ \
+ register long _num __asm__ (_NOLIBC_SYSCALL_REG) = (num); \
+ register long _arg1 __asm__ ("r0") = (long)(arg1); \
+ register long _arg2 __asm__ ("r1") = (long)(arg2); \
+ register long _arg3 __asm__ ("r2") = (long)(arg3); \
+ register long _arg4 __asm__ ("r3") = (long)(arg4); \
+ register long _arg5 __asm__ ("r4") = (long)(arg5); \
+ register long _arg6 __asm__ ("r5") = (long)(arg6); \
+ \
+ __asm__ volatile ( \
+ _NOLIBC_THUMB_SET_R7 \
+ "svc #0\n" \
+ _NOLIBC_THUMB_RESTORE_R7 \
+ : "=r"(_arg1), "=r" (_num) \
+ : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
+ "r"(_arg6), "r"(_num) \
+ : "memory", "cc", "lr" \
+ ); \
+ _arg1; \
})
diff --git a/tools/include/nolibc/arch-i386.h b/tools/include/nolibc/arch-i386.h
index 3d672d925e9e..c2e75ba91b6b 100644
--- a/tools/include/nolibc/arch-i386.h
+++ b/tools/include/nolibc/arch-i386.h
@@ -53,131 +53,131 @@ struct sys_stat_struct {
*/
#define __ARCH_WANT_SYS_OLD_SELECT
-#define my_syscall0(num) \
-({ \
- long _ret; \
- register long _num __asm__ ("eax") = (num); \
- \
- __asm__ volatile ( \
- "int $0x80\n" \
- : "=a" (_ret) \
- : "0"(_num) \
- : "memory", "cc" \
- ); \
- _ret; \
+#define my_syscall0(num) \
+({ \
+ long _ret; \
+ register long _num __asm__ ("eax") = (num); \
+ \
+ __asm__ volatile ( \
+ "int $0x80\n" \
+ : "=a" (_ret) \
+ : "0"(_num) \
+ : "memory", "cc" \
+ ); \
+ _ret; \
})
-#define my_syscall1(num, arg1) \
-({ \
- long _ret; \
- register long _num __asm__ ("eax") = (num); \
- register long _arg1 __asm__ ("ebx") = (long)(arg1); \
- \
- __asm__ volatile ( \
- "int $0x80\n" \
- : "=a" (_ret) \
- : "r"(_arg1), \
- "0"(_num) \
- : "memory", "cc" \
- ); \
- _ret; \
+#define my_syscall1(num, arg1) \
+({ \
+ long _ret; \
+ register long _num __asm__ ("eax") = (num); \
+ register long _arg1 __asm__ ("ebx") = (long)(arg1); \
+ \
+ __asm__ volatile ( \
+ "int $0x80\n" \
+ : "=a" (_ret) \
+ : "r"(_arg1), \
+ "0"(_num) \
+ : "memory", "cc" \
+ ); \
+ _ret; \
})
-#define my_syscall2(num, arg1, arg2) \
-({ \
- long _ret; \
- register long _num __asm__ ("eax") = (num); \
- register long _arg1 __asm__ ("ebx") = (long)(arg1); \
- register long _arg2 __asm__ ("ecx") = (long)(arg2); \
- \
- __asm__ volatile ( \
- "int $0x80\n" \
- : "=a" (_ret) \
- : "r"(_arg1), "r"(_arg2), \
- "0"(_num) \
- : "memory", "cc" \
- ); \
- _ret; \
+#define my_syscall2(num, arg1, arg2) \
+({ \
+ long _ret; \
+ register long _num __asm__ ("eax") = (num); \
+ register long _arg1 __asm__ ("ebx") = (long)(arg1); \
+ register long _arg2 __asm__ ("ecx") = (long)(arg2); \
+ \
+ __asm__ volatile ( \
+ "int $0x80\n" \
+ : "=a" (_ret) \
+ : "r"(_arg1), "r"(_arg2), \
+ "0"(_num) \
+ : "memory", "cc" \
+ ); \
+ _ret; \
})
-#define my_syscall3(num, arg1, arg2, arg3) \
-({ \
- long _ret; \
- register long _num __asm__ ("eax") = (num); \
- register long _arg1 __asm__ ("ebx") = (long)(arg1); \
- register long _arg2 __asm__ ("ecx") = (long)(arg2); \
- register long _arg3 __asm__ ("edx") = (long)(arg3); \
- \
- __asm__ volatile ( \
- "int $0x80\n" \
- : "=a" (_ret) \
- : "r"(_arg1), "r"(_arg2), "r"(_arg3), \
- "0"(_num) \
- : "memory", "cc" \
- ); \
- _ret; \
+#define my_syscall3(num, arg1, arg2, arg3) \
+({ \
+ long _ret; \
+ register long _num __asm__ ("eax") = (num); \
+ register long _arg1 __asm__ ("ebx") = (long)(arg1); \
+ register long _arg2 __asm__ ("ecx") = (long)(arg2); \
+ register long _arg3 __asm__ ("edx") = (long)(arg3); \
+ \
+ __asm__ volatile ( \
+ "int $0x80\n" \
+ : "=a" (_ret) \
+ : "r"(_arg1), "r"(_arg2), "r"(_arg3), \
+ "0"(_num) \
+ : "memory", "cc" \
+ ); \
+ _ret; \
})
-#define my_syscall4(num, arg1, arg2, arg3, arg4) \
-({ \
- long _ret; \
- register long _num __asm__ ("eax") = (num); \
- register long _arg1 __asm__ ("ebx") = (long)(arg1); \
- register long _arg2 __asm__ ("ecx") = (long)(arg2); \
- register long _arg3 __asm__ ("edx") = (long)(arg3); \
- register long _arg4 __asm__ ("esi") = (long)(arg4); \
- \
- __asm__ volatile ( \
- "int $0x80\n" \
- : "=a" (_ret) \
- : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), \
- "0"(_num) \
- : "memory", "cc" \
- ); \
- _ret; \
+#define my_syscall4(num, arg1, arg2, arg3, arg4) \
+({ \
+ long _ret; \
+ register long _num __asm__ ("eax") = (num); \
+ register long _arg1 __asm__ ("ebx") = (long)(arg1); \
+ register long _arg2 __asm__ ("ecx") = (long)(arg2); \
+ register long _arg3 __asm__ ("edx") = (long)(arg3); \
+ register long _arg4 __asm__ ("esi") = (long)(arg4); \
+ \
+ __asm__ volatile ( \
+ "int $0x80\n" \
+ : "=a" (_ret) \
+ : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), \
+ "0"(_num) \
+ : "memory", "cc" \
+ ); \
+ _ret; \
})
-#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
-({ \
- long _ret; \
- register long _num __asm__ ("eax") = (num); \
- register long _arg1 __asm__ ("ebx") = (long)(arg1); \
- register long _arg2 __asm__ ("ecx") = (long)(arg2); \
- register long _arg3 __asm__ ("edx") = (long)(arg3); \
- register long _arg4 __asm__ ("esi") = (long)(arg4); \
- register long _arg5 __asm__ ("edi") = (long)(arg5); \
- \
- __asm__ volatile ( \
- "int $0x80\n" \
- : "=a" (_ret) \
- : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
- "0"(_num) \
- : "memory", "cc" \
- ); \
- _ret; \
+#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
+({ \
+ long _ret; \
+ register long _num __asm__ ("eax") = (num); \
+ register long _arg1 __asm__ ("ebx") = (long)(arg1); \
+ register long _arg2 __asm__ ("ecx") = (long)(arg2); \
+ register long _arg3 __asm__ ("edx") = (long)(arg3); \
+ register long _arg4 __asm__ ("esi") = (long)(arg4); \
+ register long _arg5 __asm__ ("edi") = (long)(arg5); \
+ \
+ __asm__ volatile ( \
+ "int $0x80\n" \
+ : "=a" (_ret) \
+ : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
+ "0"(_num) \
+ : "memory", "cc" \
+ ); \
+ _ret; \
})
-#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
-({ \
- long _eax = (long)(num); \
- long _arg6 = (long)(arg6); /* Always in memory */ \
- __asm__ volatile ( \
- "pushl %[_arg6]\n\t" \
- "pushl %%ebp\n\t" \
- "movl 4(%%esp),%%ebp\n\t" \
- "int $0x80\n\t" \
- "popl %%ebp\n\t" \
- "addl $4,%%esp\n\t" \
- : "+a"(_eax) /* %eax */ \
- : "b"(arg1), /* %ebx */ \
- "c"(arg2), /* %ecx */ \
- "d"(arg3), /* %edx */ \
- "S"(arg4), /* %esi */ \
- "D"(arg5), /* %edi */ \
- [_arg6]"m"(_arg6) /* memory */ \
- : "memory", "cc" \
- ); \
- _eax; \
+#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
+({ \
+ long _eax = (long)(num); \
+ long _arg6 = (long)(arg6); /* Always in memory */ \
+ __asm__ volatile ( \
+ "pushl %[_arg6]\n\t" \
+ "pushl %%ebp\n\t" \
+ "movl 4(%%esp),%%ebp\n\t" \
+ "int $0x80\n\t" \
+ "popl %%ebp\n\t" \
+ "addl $4,%%esp\n\t" \
+ : "+a"(_eax) /* %eax */ \
+ : "b"(arg1), /* %ebx */ \
+ "c"(arg2), /* %ecx */ \
+ "d"(arg3), /* %edx */ \
+ "S"(arg4), /* %esi */ \
+ "D"(arg5), /* %edi */ \
+ [_arg6]"m"(_arg6) /* memory */ \
+ : "memory", "cc" \
+ ); \
+ _eax; \
})
char **environ __attribute__((weak));
diff --git a/tools/include/nolibc/arch-loongarch.h b/tools/include/nolibc/arch-loongarch.h
index ad3f266e7093..292d6a58dc87 100644
--- a/tools/include/nolibc/arch-loongarch.h
+++ b/tools/include/nolibc/arch-loongarch.h
@@ -23,129 +23,129 @@
*/
#define __ARCH_WANT_SYS_PSELECT6
-#define my_syscall0(num) \
-({ \
- register long _num __asm__ ("a7") = (num); \
- register long _arg1 __asm__ ("a0"); \
- \
- __asm__ volatile ( \
- "syscall 0\n" \
- : "=r"(_arg1) \
- : "r"(_num) \
- : "memory", "$t0", "$t1", "$t2", "$t3", \
- "$t4", "$t5", "$t6", "$t7", "$t8" \
- ); \
- _arg1; \
+#define my_syscall0(num) \
+({ \
+ register long _num __asm__ ("a7") = (num); \
+ register long _arg1 __asm__ ("a0"); \
+ \
+ __asm__ volatile ( \
+ "syscall 0\n" \
+ : "=r"(_arg1) \
+ : "r"(_num) \
+ : "memory", "$t0", "$t1", "$t2", "$t3", \
+ "$t4", "$t5", "$t6", "$t7", "$t8" \
+ ); \
+ _arg1; \
})
-#define my_syscall1(num, arg1) \
-({ \
- register long _num __asm__ ("a7") = (num); \
- register long _arg1 __asm__ ("a0") = (long)(arg1); \
- \
- __asm__ volatile ( \
- "syscall 0\n" \
- : "+r"(_arg1) \
- : "r"(_num) \
- : "memory", "$t0", "$t1", "$t2", "$t3", \
- "$t4", "$t5", "$t6", "$t7", "$t8" \
- ); \
- _arg1; \
+#define my_syscall1(num, arg1) \
+({ \
+ register long _num __asm__ ("a7") = (num); \
+ register long _arg1 __asm__ ("a0") = (long)(arg1); \
+ \
+ __asm__ volatile ( \
+ "syscall 0\n" \
+ : "+r"(_arg1) \
+ : "r"(_num) \
+ : "memory", "$t0", "$t1", "$t2", "$t3", \
+ "$t4", "$t5", "$t6", "$t7", "$t8" \
+ ); \
+ _arg1; \
})
-#define my_syscall2(num, arg1, arg2) \
-({ \
- register long _num __asm__ ("a7") = (num); \
- register long _arg1 __asm__ ("a0") = (long)(arg1); \
- register long _arg2 __asm__ ("a1") = (long)(arg2); \
- \
- __asm__ volatile ( \
- "syscall 0\n" \
- : "+r"(_arg1) \
- : "r"(_arg2), \
- "r"(_num) \
- : "memory", "$t0", "$t1", "$t2", "$t3", \
- "$t4", "$t5", "$t6", "$t7", "$t8" \
- ); \
- _arg1; \
+#define my_syscall2(num, arg1, arg2) \
+({ \
+ register long _num __asm__ ("a7") = (num); \
+ register long _arg1 __asm__ ("a0") = (long)(arg1); \
+ register long _arg2 __asm__ ("a1") = (long)(arg2); \
+ \
+ __asm__ volatile ( \
+ "syscall 0\n" \
+ : "+r"(_arg1) \
+ : "r"(_arg2), \
+ "r"(_num) \
+ : "memory", "$t0", "$t1", "$t2", "$t3", \
+ "$t4", "$t5", "$t6", "$t7", "$t8" \
+ ); \
+ _arg1; \
})
-#define my_syscall3(num, arg1, arg2, arg3) \
-({ \
- register long _num __asm__ ("a7") = (num); \
- register long _arg1 __asm__ ("a0") = (long)(arg1); \
- register long _arg2 __asm__ ("a1") = (long)(arg2); \
- register long _arg3 __asm__ ("a2") = (long)(arg3); \
- \
- __asm__ volatile ( \
- "syscall 0\n" \
- : "+r"(_arg1) \
- : "r"(_arg2), "r"(_arg3), \
- "r"(_num) \
- : "memory", "$t0", "$t1", "$t2", "$t3", \
- "$t4", "$t5", "$t6", "$t7", "$t8" \
- ); \
- _arg1; \
+#define my_syscall3(num, arg1, arg2, arg3) \
+({ \
+ register long _num __asm__ ("a7") = (num); \
+ register long _arg1 __asm__ ("a0") = (long)(arg1); \
+ register long _arg2 __asm__ ("a1") = (long)(arg2); \
+ register long _arg3 __asm__ ("a2") = (long)(arg3); \
+ \
+ __asm__ volatile ( \
+ "syscall 0\n" \
+ : "+r"(_arg1) \
+ : "r"(_arg2), "r"(_arg3), \
+ "r"(_num) \
+ : "memory", "$t0", "$t1", "$t2", "$t3", \
+ "$t4", "$t5", "$t6", "$t7", "$t8" \
+ ); \
+ _arg1; \
})
-#define my_syscall4(num, arg1, arg2, arg3, arg4) \
-({ \
- register long _num __asm__ ("a7") = (num); \
- register long _arg1 __asm__ ("a0") = (long)(arg1); \
- register long _arg2 __asm__ ("a1") = (long)(arg2); \
- register long _arg3 __asm__ ("a2") = (long)(arg3); \
- register long _arg4 __asm__ ("a3") = (long)(arg4); \
- \
- __asm__ volatile ( \
- "syscall 0\n" \
- : "+r"(_arg1) \
- : "r"(_arg2), "r"(_arg3), "r"(_arg4), \
- "r"(_num) \
- : "memory", "$t0", "$t1", "$t2", "$t3", \
- "$t4", "$t5", "$t6", "$t7", "$t8" \
- ); \
- _arg1; \
+#define my_syscall4(num, arg1, arg2, arg3, arg4) \
+({ \
+ register long _num __asm__ ("a7") = (num); \
+ register long _arg1 __asm__ ("a0") = (long)(arg1); \
+ register long _arg2 __asm__ ("a1") = (long)(arg2); \
+ register long _arg3 __asm__ ("a2") = (long)(arg3); \
+ register long _arg4 __asm__ ("a3") = (long)(arg4); \
+ \
+ __asm__ volatile ( \
+ "syscall 0\n" \
+ : "+r"(_arg1) \
+ : "r"(_arg2), "r"(_arg3), "r"(_arg4), \
+ "r"(_num) \
+ : "memory", "$t0", "$t1", "$t2", "$t3", \
+ "$t4", "$t5", "$t6", "$t7", "$t8" \
+ ); \
+ _arg1; \
})
-#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
-({ \
- register long _num __asm__ ("a7") = (num); \
- register long _arg1 __asm__ ("a0") = (long)(arg1); \
- register long _arg2 __asm__ ("a1") = (long)(arg2); \
- register long _arg3 __asm__ ("a2") = (long)(arg3); \
- register long _arg4 __asm__ ("a3") = (long)(arg4); \
- register long _arg5 __asm__ ("a4") = (long)(arg5); \
- \
- __asm__ volatile ( \
- "syscall 0\n" \
- : "+r"(_arg1) \
- : "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
- "r"(_num) \
- : "memory", "$t0", "$t1", "$t2", "$t3", \
- "$t4", "$t5", "$t6", "$t7", "$t8" \
- ); \
- _arg1; \
+#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
+({ \
+ register long _num __asm__ ("a7") = (num); \
+ register long _arg1 __asm__ ("a0") = (long)(arg1); \
+ register long _arg2 __asm__ ("a1") = (long)(arg2); \
+ register long _arg3 __asm__ ("a2") = (long)(arg3); \
+ register long _arg4 __asm__ ("a3") = (long)(arg4); \
+ register long _arg5 __asm__ ("a4") = (long)(arg5); \
+ \
+ __asm__ volatile ( \
+ "syscall 0\n" \
+ : "+r"(_arg1) \
+ : "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
+ "r"(_num) \
+ : "memory", "$t0", "$t1", "$t2", "$t3", \
+ "$t4", "$t5", "$t6", "$t7", "$t8" \
+ ); \
+ _arg1; \
})
-#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
-({ \
- register long _num __asm__ ("a7") = (num); \
- register long _arg1 __asm__ ("a0") = (long)(arg1); \
- register long _arg2 __asm__ ("a1") = (long)(arg2); \
- register long _arg3 __asm__ ("a2") = (long)(arg3); \
- register long _arg4 __asm__ ("a3") = (long)(arg4); \
- register long _arg5 __asm__ ("a4") = (long)(arg5); \
- register long _arg6 __asm__ ("a5") = (long)(arg6); \
- \
- __asm__ volatile ( \
- "syscall 0\n" \
- : "+r"(_arg1) \
- : "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), "r"(_arg6), \
- "r"(_num) \
- : "memory", "$t0", "$t1", "$t2", "$t3", \
- "$t4", "$t5", "$t6", "$t7", "$t8" \
- ); \
- _arg1; \
+#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
+({ \
+ register long _num __asm__ ("a7") = (num); \
+ register long _arg1 __asm__ ("a0") = (long)(arg1); \
+ register long _arg2 __asm__ ("a1") = (long)(arg2); \
+ register long _arg3 __asm__ ("a2") = (long)(arg3); \
+ register long _arg4 __asm__ ("a3") = (long)(arg4); \
+ register long _arg5 __asm__ ("a4") = (long)(arg5); \
+ register long _arg6 __asm__ ("a5") = (long)(arg6); \
+ \
+ __asm__ volatile ( \
+ "syscall 0\n" \
+ : "+r"(_arg1) \
+ : "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), "r"(_arg6), \
+ "r"(_num) \
+ : "memory", "$t0", "$t1", "$t2", "$t3", \
+ "$t4", "$t5", "$t6", "$t7", "$t8" \
+ ); \
+ _arg1; \
})
char **environ __attribute__((weak));
diff --git a/tools/include/nolibc/arch-mips.h b/tools/include/nolibc/arch-mips.h
index db24e0837a39..1fd1eedc12a6 100644
--- a/tools/include/nolibc/arch-mips.h
+++ b/tools/include/nolibc/arch-mips.h
@@ -57,125 +57,125 @@ struct sys_stat_struct {
* don't have to experience issues with register constraints.
*/
-#define my_syscall0(num) \
-({ \
- register long _num __asm__ ("v0") = (num); \
- register long _arg4 __asm__ ("a3"); \
- \
- __asm__ volatile ( \
- "addiu $sp, $sp, -32\n" \
- "syscall\n" \
- "addiu $sp, $sp, 32\n" \
- : "=r"(_num), "=r"(_arg4) \
- : "r"(_num) \
- : "memory", "cc", "at", "v1", "hi", "lo", \
- "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
- ); \
- _arg4 ? -_num : _num; \
+#define my_syscall0(num) \
+({ \
+ register long _num __asm__ ("v0") = (num); \
+ register long _arg4 __asm__ ("a3"); \
+ \
+ __asm__ volatile ( \
+ "addiu $sp, $sp, -32\n" \
+ "syscall\n" \
+ "addiu $sp, $sp, 32\n" \
+ : "=r"(_num), "=r"(_arg4) \
+ : "r"(_num) \
+ : "memory", "cc", "at", "v1", "hi", "lo", \
+ "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
+ ); \
+ _arg4 ? -_num : _num; \
})
-#define my_syscall1(num, arg1) \
-({ \
- register long _num __asm__ ("v0") = (num); \
- register long _arg1 __asm__ ("a0") = (long)(arg1); \
- register long _arg4 __asm__ ("a3"); \
- \
- __asm__ volatile ( \
- "addiu $sp, $sp, -32\n" \
- "syscall\n" \
- "addiu $sp, $sp, 32\n" \
- : "=r"(_num), "=r"(_arg4) \
- : "0"(_num), \
- "r"(_arg1) \
- : "memory", "cc", "at", "v1", "hi", "lo", \
- "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
- ); \
- _arg4 ? -_num : _num; \
+#define my_syscall1(num, arg1) \
+({ \
+ register long _num __asm__ ("v0") = (num); \
+ register long _arg1 __asm__ ("a0") = (long)(arg1); \
+ register long _arg4 __asm__ ("a3"); \
+ \
+ __asm__ volatile ( \
+ "addiu $sp, $sp, -32\n" \
+ "syscall\n" \
+ "addiu $sp, $sp, 32\n" \
+ : "=r"(_num), "=r"(_arg4) \
+ : "0"(_num), \
+ "r"(_arg1) \
+ : "memory", "cc", "at", "v1", "hi", "lo", \
+ "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
+ ); \
+ _arg4 ? -_num : _num; \
})
-#define my_syscall2(num, arg1, arg2) \
-({ \
- register long _num __asm__ ("v0") = (num); \
- register long _arg1 __asm__ ("a0") = (long)(arg1); \
- register long _arg2 __asm__ ("a1") = (long)(arg2); \
- register long _arg4 __asm__ ("a3"); \
- \
- __asm__ volatile ( \
- "addiu $sp, $sp, -32\n" \
- "syscall\n" \
- "addiu $sp, $sp, 32\n" \
- : "=r"(_num), "=r"(_arg4) \
- : "0"(_num), \
- "r"(_arg1), "r"(_arg2) \
- : "memory", "cc", "at", "v1", "hi", "lo", \
- "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
- ); \
- _arg4 ? -_num : _num; \
+#define my_syscall2(num, arg1, arg2) \
+({ \
+ register long _num __asm__ ("v0") = (num); \
+ register long _arg1 __asm__ ("a0") = (long)(arg1); \
+ register long _arg2 __asm__ ("a1") = (long)(arg2); \
+ register long _arg4 __asm__ ("a3"); \
+ \
+ __asm__ volatile ( \
+ "addiu $sp, $sp, -32\n" \
+ "syscall\n" \
+ "addiu $sp, $sp, 32\n" \
+ : "=r"(_num), "=r"(_arg4) \
+ : "0"(_num), \
+ "r"(_arg1), "r"(_arg2) \
+ : "memory", "cc", "at", "v1", "hi", "lo", \
+ "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
+ ); \
+ _arg4 ? -_num : _num; \
})
-#define my_syscall3(num, arg1, arg2, arg3) \
-({ \
- register long _num __asm__ ("v0") = (num); \
- register long _arg1 __asm__ ("a0") = (long)(arg1); \
- register long _arg2 __asm__ ("a1") = (long)(arg2); \
- register long _arg3 __asm__ ("a2") = (long)(arg3); \
- register long _arg4 __asm__ ("a3"); \
- \
- __asm__ volatile ( \
- "addiu $sp, $sp, -32\n" \
- "syscall\n" \
- "addiu $sp, $sp, 32\n" \
- : "=r"(_num), "=r"(_arg4) \
- : "0"(_num), \
- "r"(_arg1), "r"(_arg2), "r"(_arg3) \
- : "memory", "cc", "at", "v1", "hi", "lo", \
- "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
- ); \
- _arg4 ? -_num : _num; \
+#define my_syscall3(num, arg1, arg2, arg3) \
+({ \
+ register long _num __asm__ ("v0") = (num); \
+ register long _arg1 __asm__ ("a0") = (long)(arg1); \
+ register long _arg2 __asm__ ("a1") = (long)(arg2); \
+ register long _arg3 __asm__ ("a2") = (long)(arg3); \
+ register long _arg4 __asm__ ("a3"); \
+ \
+ __asm__ volatile ( \
+ "addiu $sp, $sp, -32\n" \
+ "syscall\n" \
+ "addiu $sp, $sp, 32\n" \
+ : "=r"(_num), "=r"(_arg4) \
+ : "0"(_num), \
+ "r"(_arg1), "r"(_arg2), "r"(_arg3) \
+ : "memory", "cc", "at", "v1", "hi", "lo", \
+ "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
+ ); \
+ _arg4 ? -_num : _num; \
})
-#define my_syscall4(num, arg1, arg2, arg3, arg4) \
-({ \
- register long _num __asm__ ("v0") = (num); \
- register long _arg1 __asm__ ("a0") = (long)(arg1); \
- register long _arg2 __asm__ ("a1") = (long)(arg2); \
- register long _arg3 __asm__ ("a2") = (long)(arg3); \
- register long _arg4 __asm__ ("a3") = (long)(arg4); \
- \
- __asm__ volatile ( \
- "addiu $sp, $sp, -32\n" \
- "syscall\n" \
- "addiu $sp, $sp, 32\n" \
- : "=r" (_num), "=r"(_arg4) \
- : "0"(_num), \
- "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4) \
- : "memory", "cc", "at", "v1", "hi", "lo", \
- "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
- ); \
- _arg4 ? -_num : _num; \
+#define my_syscall4(num, arg1, arg2, arg3, arg4) \
+({ \
+ register long _num __asm__ ("v0") = (num); \
+ register long _arg1 __asm__ ("a0") = (long)(arg1); \
+ register long _arg2 __asm__ ("a1") = (long)(arg2); \
+ register long _arg3 __asm__ ("a2") = (long)(arg3); \
+ register long _arg4 __asm__ ("a3") = (long)(arg4); \
+ \
+ __asm__ volatile ( \
+ "addiu $sp, $sp, -32\n" \
+ "syscall\n" \
+ "addiu $sp, $sp, 32\n" \
+ : "=r" (_num), "=r"(_arg4) \
+ : "0"(_num), \
+ "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4) \
+ : "memory", "cc", "at", "v1", "hi", "lo", \
+ "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
+ ); \
+ _arg4 ? -_num : _num; \
})
-#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
-({ \
- register long _num __asm__ ("v0") = (num); \
- register long _arg1 __asm__ ("a0") = (long)(arg1); \
- register long _arg2 __asm__ ("a1") = (long)(arg2); \
- register long _arg3 __asm__ ("a2") = (long)(arg3); \
- register long _arg4 __asm__ ("a3") = (long)(arg4); \
- register long _arg5 = (long)(arg5); \
- \
- __asm__ volatile ( \
- "addiu $sp, $sp, -32\n" \
- "sw %7, 16($sp)\n" \
- "syscall\n " \
- "addiu $sp, $sp, 32\n" \
- : "=r" (_num), "=r"(_arg4) \
- : "0"(_num), \
- "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5) \
- : "memory", "cc", "at", "v1", "hi", "lo", \
- "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
- ); \
- _arg4 ? -_num : _num; \
+#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
+({ \
+ register long _num __asm__ ("v0") = (num); \
+ register long _arg1 __asm__ ("a0") = (long)(arg1); \
+ register long _arg2 __asm__ ("a1") = (long)(arg2); \
+ register long _arg3 __asm__ ("a2") = (long)(arg3); \
+ register long _arg4 __asm__ ("a3") = (long)(arg4); \
+ register long _arg5 = (long)(arg5); \
+ \
+ __asm__ volatile ( \
+ "addiu $sp, $sp, -32\n" \
+ "sw %7, 16($sp)\n" \
+ "syscall\n " \
+ "addiu $sp, $sp, 32\n" \
+ : "=r" (_num), "=r"(_arg4) \
+ : "0"(_num), \
+ "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5) \
+ : "memory", "cc", "at", "v1", "hi", "lo", \
+ "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
+ ); \
+ _arg4 ? -_num : _num; \
})
char **environ __attribute__((weak));
diff --git a/tools/include/nolibc/arch-riscv.h b/tools/include/nolibc/arch-riscv.h
index a2e8564e66d6..4f21e862b412 100644
--- a/tools/include/nolibc/arch-riscv.h
+++ b/tools/include/nolibc/arch-riscv.h
@@ -58,122 +58,122 @@ struct sys_stat_struct {
*/
#define __ARCH_WANT_SYS_PSELECT6
-#define my_syscall0(num) \
-({ \
- register long _num __asm__ ("a7") = (num); \
- register long _arg1 __asm__ ("a0"); \
- \
- __asm__ volatile ( \
- "ecall\n\t" \
- : "=r"(_arg1) \
- : "r"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall0(num) \
+({ \
+ register long _num __asm__ ("a7") = (num); \
+ register long _arg1 __asm__ ("a0"); \
+ \
+ __asm__ volatile ( \
+ "ecall\n\t" \
+ : "=r"(_arg1) \
+ : "r"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
-#define my_syscall1(num, arg1) \
-({ \
- register long _num __asm__ ("a7") = (num); \
- register long _arg1 __asm__ ("a0") = (long)(arg1); \
- \
- __asm__ volatile ( \
- "ecall\n" \
- : "+r"(_arg1) \
- : "r"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall1(num, arg1) \
+({ \
+ register long _num __asm__ ("a7") = (num); \
+ register long _arg1 __asm__ ("a0") = (long)(arg1); \
+ \
+ __asm__ volatile ( \
+ "ecall\n" \
+ : "+r"(_arg1) \
+ : "r"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
-#define my_syscall2(num, arg1, arg2) \
-({ \
- register long _num __asm__ ("a7") = (num); \
- register long _arg1 __asm__ ("a0") = (long)(arg1); \
- register long _arg2 __asm__ ("a1") = (long)(arg2); \
- \
- __asm__ volatile ( \
- "ecall\n" \
- : "+r"(_arg1) \
- : "r"(_arg2), \
- "r"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall2(num, arg1, arg2) \
+({ \
+ register long _num __asm__ ("a7") = (num); \
+ register long _arg1 __asm__ ("a0") = (long)(arg1); \
+ register long _arg2 __asm__ ("a1") = (long)(arg2); \
+ \
+ __asm__ volatile ( \
+ "ecall\n" \
+ : "+r"(_arg1) \
+ : "r"(_arg2), \
+ "r"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
-#define my_syscall3(num, arg1, arg2, arg3) \
-({ \
- register long _num __asm__ ("a7") = (num); \
- register long _arg1 __asm__ ("a0") = (long)(arg1); \
- register long _arg2 __asm__ ("a1") = (long)(arg2); \
- register long _arg3 __asm__ ("a2") = (long)(arg3); \
- \
- __asm__ volatile ( \
- "ecall\n\t" \
- : "+r"(_arg1) \
- : "r"(_arg2), "r"(_arg3), \
- "r"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall3(num, arg1, arg2, arg3) \
+({ \
+ register long _num __asm__ ("a7") = (num); \
+ register long _arg1 __asm__ ("a0") = (long)(arg1); \
+ register long _arg2 __asm__ ("a1") = (long)(arg2); \
+ register long _arg3 __asm__ ("a2") = (long)(arg3); \
+ \
+ __asm__ volatile ( \
+ "ecall\n\t" \
+ : "+r"(_arg1) \
+ : "r"(_arg2), "r"(_arg3), \
+ "r"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
-#define my_syscall4(num, arg1, arg2, arg3, arg4) \
-({ \
- register long _num __asm__ ("a7") = (num); \
- register long _arg1 __asm__ ("a0") = (long)(arg1); \
- register long _arg2 __asm__ ("a1") = (long)(arg2); \
- register long _arg3 __asm__ ("a2") = (long)(arg3); \
- register long _arg4 __asm__ ("a3") = (long)(arg4); \
- \
- __asm__ volatile ( \
- "ecall\n" \
- : "+r"(_arg1) \
- : "r"(_arg2), "r"(_arg3), "r"(_arg4), \
- "r"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall4(num, arg1, arg2, arg3, arg4) \
+({ \
+ register long _num __asm__ ("a7") = (num); \
+ register long _arg1 __asm__ ("a0") = (long)(arg1); \
+ register long _arg2 __asm__ ("a1") = (long)(arg2); \
+ register long _arg3 __asm__ ("a2") = (long)(arg3); \
+ register long _arg4 __asm__ ("a3") = (long)(arg4); \
+ \
+ __asm__ volatile ( \
+ "ecall\n" \
+ : "+r"(_arg1) \
+ : "r"(_arg2), "r"(_arg3), "r"(_arg4), \
+ "r"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
-#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
-({ \
- register long _num __asm__ ("a7") = (num); \
- register long _arg1 __asm__ ("a0") = (long)(arg1); \
- register long _arg2 __asm__ ("a1") = (long)(arg2); \
- register long _arg3 __asm__ ("a2") = (long)(arg3); \
- register long _arg4 __asm__ ("a3") = (long)(arg4); \
- register long _arg5 __asm__ ("a4") = (long)(arg5); \
- \
- __asm__ volatile ( \
- "ecall\n" \
- : "+r"(_arg1) \
- : "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
- "r"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
+({ \
+ register long _num __asm__ ("a7") = (num); \
+ register long _arg1 __asm__ ("a0") = (long)(arg1); \
+ register long _arg2 __asm__ ("a1") = (long)(arg2); \
+ register long _arg3 __asm__ ("a2") = (long)(arg3); \
+ register long _arg4 __asm__ ("a3") = (long)(arg4); \
+ register long _arg5 __asm__ ("a4") = (long)(arg5); \
+ \
+ __asm__ volatile ( \
+ "ecall\n" \
+ : "+r"(_arg1) \
+ : "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
+ "r"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
-#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
-({ \
- register long _num __asm__ ("a7") = (num); \
- register long _arg1 __asm__ ("a0") = (long)(arg1); \
- register long _arg2 __asm__ ("a1") = (long)(arg2); \
- register long _arg3 __asm__ ("a2") = (long)(arg3); \
- register long _arg4 __asm__ ("a3") = (long)(arg4); \
- register long _arg5 __asm__ ("a4") = (long)(arg5); \
- register long _arg6 __asm__ ("a5") = (long)(arg6); \
- \
- __asm__ volatile ( \
- "ecall\n" \
- : "+r"(_arg1) \
- : "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), "r"(_arg6), \
- "r"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
+({ \
+ register long _num __asm__ ("a7") = (num); \
+ register long _arg1 __asm__ ("a0") = (long)(arg1); \
+ register long _arg2 __asm__ ("a1") = (long)(arg2); \
+ register long _arg3 __asm__ ("a2") = (long)(arg3); \
+ register long _arg4 __asm__ ("a3") = (long)(arg4); \
+ register long _arg5 __asm__ ("a4") = (long)(arg5); \
+ register long _arg6 __asm__ ("a5") = (long)(arg6); \
+ \
+ __asm__ volatile ( \
+ "ecall\n" \
+ : "+r"(_arg1) \
+ : "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), "r"(_arg6), \
+ "r"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
char **environ __attribute__((weak));
diff --git a/tools/include/nolibc/arch-s390.h b/tools/include/nolibc/arch-s390.h
index 516dff5bff8b..8cff5b05e841 100644
--- a/tools/include/nolibc/arch-s390.h
+++ b/tools/include/nolibc/arch-s390.h
@@ -47,119 +47,119 @@ struct sys_stat_struct {
*
*/
-#define my_syscall0(num) \
-({ \
- register long _num __asm__ ("1") = (num); \
- register long _rc __asm__ ("2"); \
- \
- __asm__ volatile ( \
- "svc 0\n" \
- : "=d"(_rc) \
- : "d"(_num) \
- : "memory", "cc" \
- ); \
- _rc; \
+#define my_syscall0(num) \
+({ \
+ register long _num __asm__ ("1") = (num); \
+ register long _rc __asm__ ("2"); \
+ \
+ __asm__ volatile ( \
+ "svc 0\n" \
+ : "=d"(_rc) \
+ : "d"(_num) \
+ : "memory", "cc" \
+ ); \
+ _rc; \
})
-#define my_syscall1(num, arg1) \
-({ \
- register long _num __asm__ ("1") = (num); \
- register long _arg1 __asm__ ("2") = (long)(arg1); \
- \
- __asm__ volatile ( \
- "svc 0\n" \
- : "+d"(_arg1) \
- : "d"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall1(num, arg1) \
+({ \
+ register long _num __asm__ ("1") = (num); \
+ register long _arg1 __asm__ ("2") = (long)(arg1); \
+ \
+ __asm__ volatile ( \
+ "svc 0\n" \
+ : "+d"(_arg1) \
+ : "d"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
-#define my_syscall2(num, arg1, arg2) \
-({ \
- register long _num __asm__ ("1") = (num); \
- register long _arg1 __asm__ ("2") = (long)(arg1); \
- register long _arg2 __asm__ ("3") = (long)(arg2); \
- \
- __asm__ volatile ( \
- "svc 0\n" \
- : "+d"(_arg1) \
- : "d"(_arg2), "d"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall2(num, arg1, arg2) \
+({ \
+ register long _num __asm__ ("1") = (num); \
+ register long _arg1 __asm__ ("2") = (long)(arg1); \
+ register long _arg2 __asm__ ("3") = (long)(arg2); \
+ \
+ __asm__ volatile ( \
+ "svc 0\n" \
+ : "+d"(_arg1) \
+ : "d"(_arg2), "d"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
-#define my_syscall3(num, arg1, arg2, arg3) \
-({ \
- register long _num __asm__ ("1") = (num); \
- register long _arg1 __asm__ ("2") = (long)(arg1); \
- register long _arg2 __asm__ ("3") = (long)(arg2); \
- register long _arg3 __asm__ ("4") = (long)(arg3); \
- \
- __asm__ volatile ( \
- "svc 0\n" \
- : "+d"(_arg1) \
- : "d"(_arg2), "d"(_arg3), "d"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall3(num, arg1, arg2, arg3) \
+({ \
+ register long _num __asm__ ("1") = (num); \
+ register long _arg1 __asm__ ("2") = (long)(arg1); \
+ register long _arg2 __asm__ ("3") = (long)(arg2); \
+ register long _arg3 __asm__ ("4") = (long)(arg3); \
+ \
+ __asm__ volatile ( \
+ "svc 0\n" \
+ : "+d"(_arg1) \
+ : "d"(_arg2), "d"(_arg3), "d"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
-#define my_syscall4(num, arg1, arg2, arg3, arg4) \
-({ \
- register long _num __asm__ ("1") = (num); \
- register long _arg1 __asm__ ("2") = (long)(arg1); \
- register long _arg2 __asm__ ("3") = (long)(arg2); \
- register long _arg3 __asm__ ("4") = (long)(arg3); \
- register long _arg4 __asm__ ("5") = (long)(arg4); \
- \
- __asm__ volatile ( \
- "svc 0\n" \
- : "+d"(_arg1) \
- : "d"(_arg2), "d"(_arg3), "d"(_arg4), "d"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall4(num, arg1, arg2, arg3, arg4) \
+({ \
+ register long _num __asm__ ("1") = (num); \
+ register long _arg1 __asm__ ("2") = (long)(arg1); \
+ register long _arg2 __asm__ ("3") = (long)(arg2); \
+ register long _arg3 __asm__ ("4") = (long)(arg3); \
+ register long _arg4 __asm__ ("5") = (long)(arg4); \
+ \
+ __asm__ volatile ( \
+ "svc 0\n" \
+ : "+d"(_arg1) \
+ : "d"(_arg2), "d"(_arg3), "d"(_arg4), "d"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
-#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
-({ \
- register long _num __asm__ ("1") = (num); \
- register long _arg1 __asm__ ("2") = (long)(arg1); \
- register long _arg2 __asm__ ("3") = (long)(arg2); \
- register long _arg3 __asm__ ("4") = (long)(arg3); \
- register long _arg4 __asm__ ("5") = (long)(arg4); \
- register long _arg5 __asm__ ("6") = (long)(arg5); \
- \
- __asm__ volatile ( \
- "svc 0\n" \
- : "+d"(_arg1) \
- : "d"(_arg2), "d"(_arg3), "d"(_arg4), "d"(_arg5), \
- "d"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
+({ \
+ register long _num __asm__ ("1") = (num); \
+ register long _arg1 __asm__ ("2") = (long)(arg1); \
+ register long _arg2 __asm__ ("3") = (long)(arg2); \
+ register long _arg3 __asm__ ("4") = (long)(arg3); \
+ register long _arg4 __asm__ ("5") = (long)(arg4); \
+ register long _arg5 __asm__ ("6") = (long)(arg5); \
+ \
+ __asm__ volatile ( \
+ "svc 0\n" \
+ : "+d"(_arg1) \
+ : "d"(_arg2), "d"(_arg3), "d"(_arg4), "d"(_arg5), \
+ "d"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
-#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
-({ \
- register long _num __asm__ ("1") = (num); \
- register long _arg1 __asm__ ("2") = (long)(arg1); \
- register long _arg2 __asm__ ("3") = (long)(arg2); \
- register long _arg3 __asm__ ("4") = (long)(arg3); \
- register long _arg4 __asm__ ("5") = (long)(arg4); \
- register long _arg5 __asm__ ("6") = (long)(arg5); \
- register long _arg6 __asm__ ("7") = (long)(arg6); \
- \
- __asm__ volatile ( \
- "svc 0\n" \
- : "+d"(_arg1) \
- : "d"(_arg2), "d"(_arg3), "d"(_arg4), "d"(_arg5), \
- "d"(_arg6), "d"(_num) \
- : "memory", "cc" \
- ); \
- _arg1; \
+#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
+({ \
+ register long _num __asm__ ("1") = (num); \
+ register long _arg1 __asm__ ("2") = (long)(arg1); \
+ register long _arg2 __asm__ ("3") = (long)(arg2); \
+ register long _arg3 __asm__ ("4") = (long)(arg3); \
+ register long _arg4 __asm__ ("5") = (long)(arg4); \
+ register long _arg5 __asm__ ("6") = (long)(arg5); \
+ register long _arg6 __asm__ ("7") = (long)(arg6); \
+ \
+ __asm__ volatile ( \
+ "svc 0\n" \
+ : "+d"(_arg1) \
+ : "d"(_arg2), "d"(_arg3), "d"(_arg4), "d"(_arg5), \
+ "d"(_arg6), "d"(_num) \
+ : "memory", "cc" \
+ ); \
+ _arg1; \
})
char **environ __attribute__((weak));
diff --git a/tools/include/nolibc/arch-x86_64.h b/tools/include/nolibc/arch-x86_64.h
index 6fc4d8392742..1dc8b60f5153 100644
--- a/tools/include/nolibc/arch-x86_64.h
+++ b/tools/include/nolibc/arch-x86_64.h
@@ -55,129 +55,129 @@ struct sys_stat_struct {
*
*/
-#define my_syscall0(num) \
-({ \
- long _ret; \
- register long _num __asm__ ("rax") = (num); \
- \
- __asm__ volatile ( \
- "syscall\n" \
- : "=a"(_ret) \
- : "0"(_num) \
- : "rcx", "r11", "memory", "cc" \
- ); \
- _ret; \
+#define my_syscall0(num) \
+({ \
+ long _ret; \
+ register long _num __asm__ ("rax") = (num); \
+ \
+ __asm__ volatile ( \
+ "syscall\n" \
+ : "=a"(_ret) \
+ : "0"(_num) \
+ : "rcx", "r11", "memory", "cc" \
+ ); \
+ _ret; \
})
-#define my_syscall1(num, arg1) \
-({ \
- long _ret; \
- register long _num __asm__ ("rax") = (num); \
- register long _arg1 __asm__ ("rdi") = (long)(arg1); \
- \
- __asm__ volatile ( \
- "syscall\n" \
- : "=a"(_ret) \
- : "r"(_arg1), \
- "0"(_num) \
- : "rcx", "r11", "memory", "cc" \
- ); \
- _ret; \
+#define my_syscall1(num, arg1) \
+({ \
+ long _ret; \
+ register long _num __asm__ ("rax") = (num); \
+ register long _arg1 __asm__ ("rdi") = (long)(arg1); \
+ \
+ __asm__ volatile ( \
+ "syscall\n" \
+ : "=a"(_ret) \
+ : "r"(_arg1), \
+ "0"(_num) \
+ : "rcx", "r11", "memory", "cc" \
+ ); \
+ _ret; \
})
-#define my_syscall2(num, arg1, arg2) \
-({ \
- long _ret; \
- register long _num __asm__ ("rax") = (num); \
- register long _arg1 __asm__ ("rdi") = (long)(arg1); \
- register long _arg2 __asm__ ("rsi") = (long)(arg2); \
- \
- __asm__ volatile ( \
- "syscall\n" \
- : "=a"(_ret) \
- : "r"(_arg1), "r"(_arg2), \
- "0"(_num) \
- : "rcx", "r11", "memory", "cc" \
- ); \
- _ret; \
+#define my_syscall2(num, arg1, arg2) \
+({ \
+ long _ret; \
+ register long _num __asm__ ("rax") = (num); \
+ register long _arg1 __asm__ ("rdi") = (long)(arg1); \
+ register long _arg2 __asm__ ("rsi") = (long)(arg2); \
+ \
+ __asm__ volatile ( \
+ "syscall\n" \
+ : "=a"(_ret) \
+ : "r"(_arg1), "r"(_arg2), \
+ "0"(_num) \
+ : "rcx", "r11", "memory", "cc" \
+ ); \
+ _ret; \
})
-#define my_syscall3(num, arg1, arg2, arg3) \
-({ \
- long _ret; \
- register long _num __asm__ ("rax") = (num); \
- register long _arg1 __asm__ ("rdi") = (long)(arg1); \
- register long _arg2 __asm__ ("rsi") = (long)(arg2); \
- register long _arg3 __asm__ ("rdx") = (long)(arg3); \
- \
- __asm__ volatile ( \
- "syscall\n" \
- : "=a"(_ret) \
- : "r"(_arg1), "r"(_arg2), "r"(_arg3), \
- "0"(_num) \
- : "rcx", "r11", "memory", "cc" \
- ); \
- _ret; \
+#define my_syscall3(num, arg1, arg2, arg3) \
+({ \
+ long _ret; \
+ register long _num __asm__ ("rax") = (num); \
+ register long _arg1 __asm__ ("rdi") = (long)(arg1); \
+ register long _arg2 __asm__ ("rsi") = (long)(arg2); \
+ register long _arg3 __asm__ ("rdx") = (long)(arg3); \
+ \
+ __asm__ volatile ( \
+ "syscall\n" \
+ : "=a"(_ret) \
+ : "r"(_arg1), "r"(_arg2), "r"(_arg3), \
+ "0"(_num) \
+ : "rcx", "r11", "memory", "cc" \
+ ); \
+ _ret; \
})
-#define my_syscall4(num, arg1, arg2, arg3, arg4) \
-({ \
- long _ret; \
- register long _num __asm__ ("rax") = (num); \
- register long _arg1 __asm__ ("rdi") = (long)(arg1); \
- register long _arg2 __asm__ ("rsi") = (long)(arg2); \
- register long _arg3 __asm__ ("rdx") = (long)(arg3); \
- register long _arg4 __asm__ ("r10") = (long)(arg4); \
- \
- __asm__ volatile ( \
- "syscall\n" \
- : "=a"(_ret) \
- : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), \
- "0"(_num) \
- : "rcx", "r11", "memory", "cc" \
- ); \
- _ret; \
+#define my_syscall4(num, arg1, arg2, arg3, arg4) \
+({ \
+ long _ret; \
+ register long _num __asm__ ("rax") = (num); \
+ register long _arg1 __asm__ ("rdi") = (long)(arg1); \
+ register long _arg2 __asm__ ("rsi") = (long)(arg2); \
+ register long _arg3 __asm__ ("rdx") = (long)(arg3); \
+ register long _arg4 __asm__ ("r10") = (long)(arg4); \
+ \
+ __asm__ volatile ( \
+ "syscall\n" \
+ : "=a"(_ret) \
+ : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), \
+ "0"(_num) \
+ : "rcx", "r11", "memory", "cc" \
+ ); \
+ _ret; \
})
-#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
-({ \
- long _ret; \
- register long _num __asm__ ("rax") = (num); \
- register long _arg1 __asm__ ("rdi") = (long)(arg1); \
- register long _arg2 __asm__ ("rsi") = (long)(arg2); \
- register long _arg3 __asm__ ("rdx") = (long)(arg3); \
- register long _arg4 __asm__ ("r10") = (long)(arg4); \
- register long _arg5 __asm__ ("r8") = (long)(arg5); \
- \
- __asm__ volatile ( \
- "syscall\n" \
- : "=a"(_ret) \
- : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
- "0"(_num) \
- : "rcx", "r11", "memory", "cc" \
- ); \
- _ret; \
+#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
+({ \
+ long _ret; \
+ register long _num __asm__ ("rax") = (num); \
+ register long _arg1 __asm__ ("rdi") = (long)(arg1); \
+ register long _arg2 __asm__ ("rsi") = (long)(arg2); \
+ register long _arg3 __asm__ ("rdx") = (long)(arg3); \
+ register long _arg4 __asm__ ("r10") = (long)(arg4); \
+ register long _arg5 __asm__ ("r8") = (long)(arg5); \
+ \
+ __asm__ volatile ( \
+ "syscall\n" \
+ : "=a"(_ret) \
+ : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
+ "0"(_num) \
+ : "rcx", "r11", "memory", "cc" \
+ ); \
+ _ret; \
})
-#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
-({ \
- long _ret; \
- register long _num __asm__ ("rax") = (num); \
- register long _arg1 __asm__ ("rdi") = (long)(arg1); \
- register long _arg2 __asm__ ("rsi") = (long)(arg2); \
- register long _arg3 __asm__ ("rdx") = (long)(arg3); \
- register long _arg4 __asm__ ("r10") = (long)(arg4); \
- register long _arg5 __asm__ ("r8") = (long)(arg5); \
- register long _arg6 __asm__ ("r9") = (long)(arg6); \
- \
- __asm__ volatile ( \
- "syscall\n" \
- : "=a"(_ret) \
- : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
- "r"(_arg6), "0"(_num) \
- : "rcx", "r11", "memory", "cc" \
- ); \
- _ret; \
+#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
+({ \
+ long _ret; \
+ register long _num __asm__ ("rax") = (num); \
+ register long _arg1 __asm__ ("rdi") = (long)(arg1); \
+ register long _arg2 __asm__ ("rsi") = (long)(arg2); \
+ register long _arg3 __asm__ ("rdx") = (long)(arg3); \
+ register long _arg4 __asm__ ("r10") = (long)(arg4); \
+ register long _arg5 __asm__ ("r8") = (long)(arg5); \
+ register long _arg6 __asm__ ("r9") = (long)(arg6); \
+ \
+ __asm__ volatile ( \
+ "syscall\n" \
+ : "=a"(_ret) \
+ : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
+ "r"(_arg6), "0"(_num) \
+ : "rcx", "r11", "memory", "cc" \
+ ); \
+ _ret; \
})
char **environ __attribute__((weak));
--
2.25.1
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next prev parent reply other threads:[~2023-06-28 13:21 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-19 15:40 [PATCH v4 00/10] tools/nolibc: add a new syscall helper Zhangjin Wu
2023-06-19 15:41 ` [PATCH v4 01/10] tools/nolibc: sys.h: add a syscall return helper Zhangjin Wu
2023-06-19 15:42 ` [PATCH v4 02/10] tools/nolibc: unistd.h: apply __sysret() helper Zhangjin Wu
2023-06-19 15:44 ` [PATCH v4 03/10] tools/nolibc: sys.h: " Zhangjin Wu
2023-06-19 15:45 ` [PATCH v4 04/10] tools/nolibc: unistd.h: reorder the syscall macros Zhangjin Wu
2023-06-19 15:47 ` [PATCH v4 05/10] tools/nolibc: add missing my_syscall6() for mips Zhangjin Wu
2023-06-19 15:48 ` [PATCH v4 06/10] tools/nolibc: __sysret: support syscalls who return a pointer Zhangjin Wu
2023-06-19 15:51 ` [PATCH v4 07/10] tools/nolibc: clean up mmap() support Zhangjin Wu
2023-06-21 18:48 ` Thomas Weißschuh
2023-06-22 19:08 ` Zhangjin Wu
2023-06-19 15:52 ` [PATCH v4 08/10] selftests/nolibc: add EXPECT_PTREQ, EXPECT_PTRNE and EXPECT_PTRER Zhangjin Wu
2023-06-19 15:54 ` [PATCH v4 09/10] selftests/nolibc: add sbrk_0 to test current brk getting Zhangjin Wu
2023-06-19 15:55 ` [PATCH v4 10/10] selftests/nolibc: add mmap and munmap test cases Zhangjin Wu
2023-06-19 16:14 ` Zhangjin Wu
2023-06-21 18:58 ` Thomas Weißschuh
2023-06-22 19:32 ` Zhangjin Wu
2023-06-22 19:56 ` Thomas Weißschuh
2023-06-24 7:47 ` Zhangjin Wu
2023-06-28 13:07 ` [PATCH v5 00/14] tools/nolibc: add a new syscall helper Zhangjin Wu
2023-06-28 13:08 ` [PATCH v5 01/14] tools/nolibc: sys.h: add a syscall return helper Zhangjin Wu
2023-06-28 13:11 ` [PATCH v5 02/14] tools/nolibc: unistd.h: apply __sysret() helper Zhangjin Wu
2023-06-28 13:13 ` [PATCH v5 03/14] tools/nolibc: sys.h: " Zhangjin Wu
2023-06-28 13:14 ` [PATCH v5 04/14] tools/nolibc: unistd.h: reorder the syscall macros Zhangjin Wu
2023-06-28 13:17 ` [PATCH v5 05/14] tools/nolibc: string.h: clean up multiple whitespaces with tab Zhangjin Wu
2023-06-28 13:19 ` Zhangjin Wu [this message]
2023-07-02 18:44 ` [PATCH v5 06/14] tools/nolibc: arch-*.h: clean up multiple whitespaces Willy Tarreau
2023-07-03 14:02 ` Zhangjin Wu
2023-06-28 13:22 ` [PATCH v5 07/14] tools/nolibc: arch-loongarch.h: shrink with SYSCALL_CLOBBERLIST Zhangjin Wu
2023-07-02 18:50 ` Willy Tarreau
2023-07-03 11:28 ` Zhangjin Wu
2023-06-28 13:31 ` [PATCH v5 08/14] tools/nolibc: arch-mips.h: " Zhangjin Wu
2023-06-28 13:37 ` [PATCH v5 09/14] tools/nolibc: add missing my_syscall6() for mips Zhangjin Wu
2023-07-02 18:55 ` Willy Tarreau
2023-07-03 10:13 ` Zhangjin Wu
2023-06-28 13:39 ` [PATCH v5 10/14] tools/nolibc: __sysret: support syscalls who return a pointer Zhangjin Wu
2023-07-02 19:17 ` Willy Tarreau
2023-07-03 8:36 ` Zhangjin Wu
2023-07-03 10:03 ` Willy Tarreau
2023-07-03 11:15 ` Zhangjin Wu
2023-06-28 13:41 ` [PATCH v5 11/14] tools/nolibc: clean up mmap() support Zhangjin Wu
2023-07-02 19:23 ` Willy Tarreau
2023-07-03 6:51 ` Zhangjin Wu
2023-06-28 13:44 ` [PATCH v5 12/14] selftests/nolibc: add EXPECT_PTREQ, EXPECT_PTRNE and EXPECT_PTRER Zhangjin Wu
2023-06-28 13:46 ` [PATCH v5 13/14] selftests/nolibc: add sbrk_0 to test current brk getting Zhangjin Wu
2023-06-28 13:51 ` [PATCH v5 14/14] selftests/nolibc: add mmap and munmap test cases Zhangjin Wu
2023-07-02 19:33 ` Willy Tarreau
2023-07-03 6:03 ` Zhangjin Wu
2023-07-03 7:25 ` Willy Tarreau
2023-07-03 8:06 ` Zhangjin Wu
2023-07-03 8:20 ` Thomas Weißschuh
2023-07-03 9:15 ` Zhangjin Wu
2023-07-03 9:56 ` Willy Tarreau
2023-07-03 11:24 ` Zhangjin Wu
2023-07-02 19:34 ` [PATCH v5 00/14] tools/nolibc: add a new syscall helper Willy Tarreau
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