From: Palmer Dabbelt <palmer@sifive.com>
To: rppt@linux.ibm.com
Cc: aou@eecs.berkeley.edu, alankao@andestech.com,
Atish Patra <Atish.Patra@wdc.com>,
anup@brainfault.org, Paul Walmsley <paul.walmsley@sifive.com>,
linux-kernel@vger.kernel.org, alexios.zavras@intel.com,
gary@garyguo.net, Greg KH <gregkh@linuxfoundation.org>,
linux-riscv@lists.infradead.org, tglx@linutronix.de
Subject: Re: [RFC PATCH 1/2] RISC-V: Mark existing SBI as legacy SBI.
Date: Wed, 28 Aug 2019 14:37:33 -0700 (PDT) [thread overview]
Message-ID: <mhng-fbf98ed7-3965-43d2-a816-ee1922bd4df1@palmer-si-x1c4> (raw)
In-Reply-To: <20190827083700.GF682@rapoport-lnx>
On Tue, 27 Aug 2019 01:37:00 PDT (-0700), rppt@linux.ibm.com wrote:
> On Tue, Aug 27, 2019 at 01:58:03PM +0530, Anup Patel wrote:
>> On Tue, Aug 27, 2019 at 1:21 PM Mike Rapoport <rppt@linux.ibm.com> wrote:
>> >
>> > On Mon, Aug 26, 2019 at 04:32:55PM -0700, Atish Patra wrote:
>> > > As per the new SBI specification, current SBI implementation is
>> > > defined as legacy and will be removed/replaced in future.
>> > >
>> > > Rename existing implementation to reflect that. This patch is just
>> > > a preparatory patch for SBI v0.2 and doesn't introduce any functional
>> > > changes.
>> > >
>> > > Signed-off-by: Atish Patra <atish.patra@wdc.com>
>> > > ---
>> > > arch/riscv/include/asm/sbi.h | 61 +++++++++++++++++++-----------------
>> > > 1 file changed, 33 insertions(+), 28 deletions(-)
>> > >
>> > > diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
>> > > index 21134b3ef404..7f5ecaaaa0d7 100644
>> > > --- a/arch/riscv/include/asm/sbi.h
>> > > +++ b/arch/riscv/include/asm/sbi.h
>> > > @@ -8,17 +8,18 @@
>> > >
>> > > #include <linux/types.h>
>> > >
>> > > -#define SBI_SET_TIMER 0
>> > > -#define SBI_CONSOLE_PUTCHAR 1
>> > > -#define SBI_CONSOLE_GETCHAR 2
>> > > -#define SBI_CLEAR_IPI 3
>> > > -#define SBI_SEND_IPI 4
>> > > -#define SBI_REMOTE_FENCE_I 5
>> > > -#define SBI_REMOTE_SFENCE_VMA 6
>> > > -#define SBI_REMOTE_SFENCE_VMA_ASID 7
>> > > -#define SBI_SHUTDOWN 8
>> > > -
>> > > -#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \
>> > > +
>> > > +#define SBI_EXT_LEGACY_SET_TIMER 0x0
>> > > +#define SBI_EXT_LEGACY_CONSOLE_PUTCHAR 0x1
>> > > +#define SBI_EXT_LEGACY_CONSOLE_GETCHAR 0x2
>> > > +#define SBI_EXT_LEGACY_CLEAR_IPI 0x3
>> > > +#define SBI_EXT_LEGACY_SEND_IPI 0x4
>> > > +#define SBI_EXT_LEGACY_REMOTE_FENCE_I 0x5
>> > > +#define SBI_EXT_LEGACY_REMOTE_SFENCE_VMA 0x6
>> > > +#define SBI_EXT_LEGACY_REMOTE_SFENCE_VMA_ASID 0x7
>> > > +#define SBI_EXT_LEGACY_SHUTDOWN 0x8
>> >
>> > I can't say I'm closely following RISC-V development, but what will happen
>> > when SBI v0.3 will come out and will render v0.2 legacy?
>> > Won't we need another similar renaming then?
>>
>> Going forward with SBI v0.3 and higher, we won't see any calling
>> convention changes.
>>
>> The SBI spec will be maintained and improved by RISC-V UNIX
>> platform spec working group.
>>
>> My best guess is that, all future SBI releases (v0.3 or higher) will
>> include more optional SBI extensions (hart hotplug, power management, etc).
>
> Thanks for the clarification!
Specifically the issue is that 0.1 didn't include any mechanism for probing the
existence of a function, but since that has been added in 0.2 it's possible to
maintain compatible with future versions.
>
>> Regards,
>> Anup
>>
>> >
>> > > +#define SBI_CALL_LEGACY(which, arg0, arg1, arg2, arg3) ({ \
>> > > register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \
>> > > register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \
>> > > register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \
>> > > @@ -32,58 +33,61 @@
>> > > })
>> > >
>> > > /* Lazy implementations until SBI is finalized */
>> > > -#define SBI_CALL_0(which) SBI_CALL(which, 0, 0, 0, 0)
>> > > -#define SBI_CALL_1(which, arg0) SBI_CALL(which, arg0, 0, 0, 0)
>> > > -#define SBI_CALL_2(which, arg0, arg1) SBI_CALL(which, arg0, arg1, 0, 0)
>> > > -#define SBI_CALL_3(which, arg0, arg1, arg2) \
>> > > - SBI_CALL(which, arg0, arg1, arg2, 0)
>> > > -#define SBI_CALL_4(which, arg0, arg1, arg2, arg3) \
>> > > - SBI_CALL(which, arg0, arg1, arg2, arg3)
>> > > +#define SBI_CALL_LEGACY_0(which) SBI_CALL_LEGACY(which, 0, 0, 0, 0)
>> > > +#define SBI_CALL_LEGACY_1(which, arg0) SBI_CALL_LEGACY(which, arg0, 0, 0, 0)
>> > > +#define SBI_CALL_LEGACY_2(which, arg0, arg1) \
>> > > + SBI_CALL_LEGACY(which, arg0, arg1, 0, 0)
>> > > +#define SBI_CALL_LEGACY_3(which, arg0, arg1, arg2) \
>> > > + SBI_CALL_LEGACY(which, arg0, arg1, arg2, 0)
>> > > +#define SBI_CALL_LEGACY_4(which, arg0, arg1, arg2, arg3) \
>> > > + SBI_CALL_LEGACY(which, arg0, arg1, arg2, arg3)
>> > >
>> > > static inline void sbi_console_putchar(int ch)
>> > > {
>> > > - SBI_CALL_1(SBI_CONSOLE_PUTCHAR, ch);
>> > > + SBI_CALL_LEGACY_1(SBI_EXT_LEGACY_CONSOLE_PUTCHAR, ch);
>> > > }
>> > >
>> > > static inline int sbi_console_getchar(void)
>> > > {
>> > > - return SBI_CALL_0(SBI_CONSOLE_GETCHAR);
>> > > + return SBI_CALL_LEGACY_0(SBI_EXT_LEGACY_CONSOLE_GETCHAR);
>> > > }
>> > >
>> > > static inline void sbi_set_timer(uint64_t stime_value)
>> > > {
>> > > #if __riscv_xlen == 32
>> > > - SBI_CALL_2(SBI_SET_TIMER, stime_value, stime_value >> 32);
>> > > + SBI_CALL_LEGACY_2(SBI_EXT_LEGACY_SET_TIMER, stime_value,
>> > > + stime_value >> 32);
>> > > #else
>> > > - SBI_CALL_1(SBI_SET_TIMER, stime_value);
>> > > + SBI_CALL_LEGACY_1(SBI_EXT_LEGACY_SET_TIMER, stime_value);
>> > > #endif
>> > > }
>> > >
>> > > static inline void sbi_shutdown(void)
>> > > {
>> > > - SBI_CALL_0(SBI_SHUTDOWN);
>> > > + SBI_CALL_LEGACY_0(SBI_EXT_LEGACY_SHUTDOWN);
>> > > }
>> > >
>> > > static inline void sbi_clear_ipi(void)
>> > > {
>> > > - SBI_CALL_0(SBI_CLEAR_IPI);
>> > > + SBI_CALL_LEGACY_0(SBI_EXT_LEGACY_CLEAR_IPI);
>> > > }
>> > >
>> > > static inline void sbi_send_ipi(const unsigned long *hart_mask)
>> > > {
>> > > - SBI_CALL_1(SBI_SEND_IPI, hart_mask);
>> > > + SBI_CALL_LEGACY_1(SBI_EXT_LEGACY_SEND_IPI, hart_mask);
>> > > }
>> > >
>> > > static inline void sbi_remote_fence_i(const unsigned long *hart_mask)
>> > > {
>> > > - SBI_CALL_1(SBI_REMOTE_FENCE_I, hart_mask);
>> > > + SBI_CALL_LEGACY_1(SBI_EXT_LEGACY_REMOTE_FENCE_I, hart_mask);
>> > > }
>> > >
>> > > static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask,
>> > > unsigned long start,
>> > > unsigned long size)
>> > > {
>> > > - SBI_CALL_3(SBI_REMOTE_SFENCE_VMA, hart_mask, start, size);
>> > > + SBI_CALL_LEGACY_3(SBI_EXT_LEGACY_REMOTE_SFENCE_VMA, hart_mask,
>> > > + start, size);
>> > > }
>> > >
>> > > static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
>> > > @@ -91,7 +95,8 @@ static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
>> > > unsigned long size,
>> > > unsigned long asid)
>> > > {
>> > > - SBI_CALL_4(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask, start, size, asid);
>> > > + SBI_CALL_LEGACY_4(SBI_EXT_LEGACY_REMOTE_SFENCE_VMA_ASID, hart_mask,
>> > > + start, size, asid);
>> > > }
>> > >
>> > > #endif
>> > > --
>> > > 2.21.0
>> > >
>> > >
>> > > _______________________________________________
>> > > linux-riscv mailing list
>> > > linux-riscv@lists.infradead.org
>> > > http://lists.infradead.org/mailman/listinfo/linux-riscv
>> > >
>> >
>> > --
>> > Sincerely yours,
>> > Mike.
>> >
>> >
>> > _______________________________________________
>> > linux-riscv mailing list
>> > linux-riscv@lists.infradead.org
>> > http://lists.infradead.org/mailman/listinfo/linux-riscv
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv
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next prev parent reply other threads:[~2019-08-28 21:37 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-26 23:32 [RFC PATCH 0/2] Add support for SBI version to 0.2 Atish Patra
2019-08-26 23:32 ` [RFC PATCH 1/2] RISC-V: Mark existing SBI as legacy SBI Atish Patra
2019-08-27 7:51 ` Mike Rapoport
2019-08-27 8:28 ` Anup Patel
2019-08-27 8:37 ` Mike Rapoport
2019-08-28 21:37 ` Palmer Dabbelt [this message]
2019-08-27 20:34 ` Atish Patra
2019-08-27 14:03 ` Christoph Hellwig
2019-08-27 14:04 ` Christoph Hellwig
2019-08-27 20:37 ` Atish Patra
2019-08-29 10:56 ` hch
2019-08-26 23:32 ` [RFC PATCH 2/2] RISC-V: Add basic support for SBI v0.2 Atish Patra
2019-08-27 7:58 ` Mike Rapoport
2019-08-27 8:23 ` Anup Patel
2019-08-27 8:39 ` Mike Rapoport
2019-08-27 9:28 ` Anup Patel
2019-08-27 20:30 ` Atish Patra
2019-08-27 9:36 ` Anup Patel
2019-08-27 20:43 ` Atish Patra
2019-08-27 14:11 ` Christoph Hellwig
2019-08-27 14:46 ` [RFC PATCH 0/2] Add support for SBI version to 0.2 Christoph Hellwig
2019-08-27 22:19 ` Atish Patra
2019-08-29 10:59 ` hch
2019-08-30 23:13 ` Atish Patra
2019-09-03 7:38 ` hch
[not found] ` <CANs6eMmcbtJ5KTU00LpfTtXszsdi1Jem_5j6GWO+8Yo3JnvTqg@mail.gmail.com>
2019-09-16 6:54 ` hch
2019-09-16 16:12 ` Palmer Dabbelt
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