linux-serial.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>,
	Magnus Damm <magnus.damm@gmail.com>,
	Rob Herring <robh+dt@kernel.org>, Vinod Koul <vkoul@kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Bartosz Golaszewski <bgolaszewski@baylibre.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Marc Zyngier <maz@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Russell King <linux@armlinux.org.uk>
Cc: Lad Prabhakar <prabhakar.csengg@gmail.com>,
	devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
	linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org,
	linux-gpio@vger.kernel.org, linux-serial@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH 06/18] pinctrl: sh-pfc: r8a7790: Add r8a7742 PFC support
Date: Wed, 29 Apr 2020 22:56:43 +0100	[thread overview]
Message-ID: <1588197415-13747-7-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw)
In-Reply-To: <1588197415-13747-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com>

Renesas RZ/G1H (R8A7742) is pin compatible with R-Car H2 (R8A7790).

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
---
 drivers/pinctrl/sh-pfc/Kconfig       |  4 ++++
 drivers/pinctrl/sh-pfc/Makefile      |  1 +
 drivers/pinctrl/sh-pfc/core.c        |  6 ++++++
 drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 24 ++++++++++++++++++++++++
 drivers/pinctrl/sh-pfc/sh_pfc.h      |  1 +
 5 files changed, 36 insertions(+)

diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig
index 9552851..c461a2f 100644
--- a/drivers/pinctrl/sh-pfc/Kconfig
+++ b/drivers/pinctrl/sh-pfc/Kconfig
@@ -12,6 +12,7 @@ config PINCTRL_SH_PFC
 	select PINCTRL_PFC_EMEV2 if ARCH_EMEV2
 	select PINCTRL_PFC_R8A73A4 if ARCH_R8A73A4
 	select PINCTRL_PFC_R8A7740 if ARCH_R8A7740
+	select PINCTRL_PFC_R8A7742 if ARCH_R8A7742
 	select PINCTRL_PFC_R8A7743 if ARCH_R8A7743
 	select PINCTRL_PFC_R8A7744 if ARCH_R8A7744
 	select PINCTRL_PFC_R8A7745 if ARCH_R8A7745
@@ -74,6 +75,9 @@ config PINCTRL_PFC_R8A7740
 	bool "R-Mobile A1 pin control support" if COMPILE_TEST
 	select PINCTRL_SH_PFC_GPIO
 
+config PINCTRL_PFC_R8A7742
+	bool "RZ/G1H pin control support" if COMPILE_TEST
+
 config PINCTRL_PFC_R8A7743
 	bool "RZ/G1M pin control support" if COMPILE_TEST
 
diff --git a/drivers/pinctrl/sh-pfc/Makefile b/drivers/pinctrl/sh-pfc/Makefile
index 9ebe321..3855d82 100644
--- a/drivers/pinctrl/sh-pfc/Makefile
+++ b/drivers/pinctrl/sh-pfc/Makefile
@@ -4,6 +4,7 @@ obj-$(CONFIG_PINCTRL_SH_PFC_GPIO)	+= gpio.o
 obj-$(CONFIG_PINCTRL_PFC_EMEV2)	+= pfc-emev2.o
 obj-$(CONFIG_PINCTRL_PFC_R8A73A4)	+= pfc-r8a73a4.o
 obj-$(CONFIG_PINCTRL_PFC_R8A7740)	+= pfc-r8a7740.o
+obj-$(CONFIG_PINCTRL_PFC_R8A7742)	+= pfc-r8a7790.o
 obj-$(CONFIG_PINCTRL_PFC_R8A7743)	+= pfc-r8a7791.o
 obj-$(CONFIG_PINCTRL_PFC_R8A7744)	+= pfc-r8a7791.o
 obj-$(CONFIG_PINCTRL_PFC_R8A7745)	+= pfc-r8a7794.o
diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
index a2e19ef..f368383 100644
--- a/drivers/pinctrl/sh-pfc/core.c
+++ b/drivers/pinctrl/sh-pfc/core.c
@@ -485,6 +485,12 @@ static const struct of_device_id sh_pfc_of_table[] = {
 		.data = &r8a7740_pinmux_info,
 	},
 #endif
+#ifdef CONFIG_PINCTRL_PFC_R8A7742
+	{
+		.compatible = "renesas,pfc-r8a7742",
+		.data = &r8a7742_pinmux_info,
+	},
+#endif
 #ifdef CONFIG_PINCTRL_PFC_R8A7743
 	{
 		.compatible = "renesas,pfc-r8a7743",
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index 3366ed5..11cbcff 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -5736,6 +5736,7 @@ static const struct sh_pfc_soc_operations r8a7790_pinmux_ops = {
 	.pin_to_pocctrl = r8a7790_pin_to_pocctrl,
 };
 
+#ifdef CONFIG_PINCTRL_PFC_R8A7790
 const struct sh_pfc_soc_info r8a7790_pinmux_info = {
 	.name = "r8a77900_pfc",
 	.ops = &r8a7790_pinmux_ops,
@@ -5755,3 +5756,26 @@ const struct sh_pfc_soc_info r8a7790_pinmux_info = {
 	.pinmux_data = pinmux_data,
 	.pinmux_data_size = ARRAY_SIZE(pinmux_data),
 };
+#endif
+
+#ifdef CONFIG_PINCTRL_PFC_R8A7742
+const struct sh_pfc_soc_info r8a7742_pinmux_info = {
+	.name = "r8a77420_pfc",
+	.ops = &r8a7790_pinmux_ops,
+	.unlock_reg = 0xe6060000, /* PMMR */
+
+	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
+
+	.pins = pinmux_pins,
+	.nr_pins = ARRAY_SIZE(pinmux_pins),
+	.groups = pinmux_groups,
+	.nr_groups = ARRAY_SIZE(pinmux_groups),
+	.functions = pinmux_functions,
+	.nr_functions = ARRAY_SIZE(pinmux_functions),
+
+	.cfg_regs = pinmux_config_regs,
+
+	.pinmux_data = pinmux_data,
+	.pinmux_data_size = ARRAY_SIZE(pinmux_data),
+};
+#endif
diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
index d57e633..0f01382 100644
--- a/drivers/pinctrl/sh-pfc/sh_pfc.h
+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
@@ -304,6 +304,7 @@ struct sh_pfc_soc_info {
 extern const struct sh_pfc_soc_info emev2_pinmux_info;
 extern const struct sh_pfc_soc_info r8a73a4_pinmux_info;
 extern const struct sh_pfc_soc_info r8a7740_pinmux_info;
+extern const struct sh_pfc_soc_info r8a7742_pinmux_info;
 extern const struct sh_pfc_soc_info r8a7743_pinmux_info;
 extern const struct sh_pfc_soc_info r8a7744_pinmux_info;
 extern const struct sh_pfc_soc_info r8a7745_pinmux_info;
-- 
2.7.4


  parent reply	other threads:[~2020-04-29 21:58 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-29 21:56 [PATCH 00/18] Add R8A7742/RZG1H board support Lad Prabhakar
2020-04-29 21:56 ` [PATCH 01/18] soc: renesas: Add Renesas R8A7742 config option Lad Prabhakar
2020-04-30 12:57   ` Geert Uytterhoeven
2020-04-29 21:56 ` [PATCH 02/18] ARM: shmobile: defconfig: Enable r8a7742 SoC Lad Prabhakar
2020-04-30 12:58   ` Geert Uytterhoeven
2020-04-29 21:56 ` [PATCH 03/18] ARM: multi_v7_defconfig: " Lad Prabhakar
2020-04-30 12:59   ` Geert Uytterhoeven
2020-04-29 21:56 ` [PATCH 04/18] ARM: debug-ll: Add support for r8a7742 Lad Prabhakar
2020-04-29 21:59   ` Russell King - ARM Linux admin
2020-04-29 22:03     ` Lad, Prabhakar
2020-04-30 13:03   ` Geert Uytterhoeven
2020-05-01  8:19     ` Lad, Prabhakar
2020-04-29 21:56 ` [PATCH 05/18] dt-bindings: pinctrl: sh-pfc: Document r8a7742 PFC support Lad Prabhakar
2020-04-30 13:04   ` Geert Uytterhoeven
2020-04-29 21:56 ` Lad Prabhakar [this message]
2020-04-30 13:17   ` [PATCH 06/18] pinctrl: sh-pfc: r8a7790: Add " Geert Uytterhoeven
2020-05-01  8:08     ` Lad, Prabhakar
2020-04-29 21:56 ` [PATCH 07/18] ARM: dts: r8a7742: Initial SoC device tree Lad Prabhakar
2020-04-30 13:49   ` Geert Uytterhoeven
2020-05-01  8:15     ` Lad, Prabhakar
2020-04-29 21:56 ` [PATCH 08/18] dt-bindings: irqchip: renesas-irqc: Document r8a7742 bindings Lad Prabhakar
2020-04-30 13:52   ` Geert Uytterhoeven
2020-04-29 21:56 ` [PATCH 09/18] ARM: dts: r8a7742: Add IRQC support Lad Prabhakar
2020-04-30 13:54   ` Geert Uytterhoeven
2020-04-30 14:01     ` Marc Zyngier
2020-04-30 14:04       ` Geert Uytterhoeven
2020-04-29 21:56 ` [PATCH 10/18] dt-bindings: rcar-dmac: Document r8a7742 support Lad Prabhakar
2020-04-30 13:56   ` Geert Uytterhoeven
2020-04-29 21:56 ` [PATCH 11/18] ARM: dts: r8a7742: Add SYS-DMAC support Lad Prabhakar
2020-04-30 14:00   ` Geert Uytterhoeven
2020-04-29 21:56 ` [PATCH 12/18] dt-bindings: serial: renesas,scif: Document r8a7742 bindings Lad Prabhakar
2020-04-30 14:01   ` Geert Uytterhoeven
2020-04-29 21:56 ` [PATCH 13/18] dt-bindings: serial: renesas,scifa: " Lad Prabhakar
2020-04-30 14:02   ` Geert Uytterhoeven
2020-04-29 21:56 ` [PATCH 14/18] dt-bindings: serial: renesas,scifb: " Lad Prabhakar
2020-04-30 14:03   ` Geert Uytterhoeven
2020-04-29 21:56 ` [PATCH 15/18] dt-bindings: serial: renesas,hscif: " Lad Prabhakar
2020-04-30 14:03   ` Geert Uytterhoeven
2020-04-29 21:56 ` [PATCH 16/18] ARM: dts: r8a7742: Add [H]SCIF{A|B} support Lad Prabhakar
2020-04-30 14:27   ` Geert Uytterhoeven
2020-04-29 21:56 ` [PATCH 17/18] dt-bindings: gpio: rcar: Add r8a7742 (RZ/G1H) support Lad Prabhakar
2020-04-30 14:28   ` Geert Uytterhoeven
2020-05-12 14:52   ` Rob Herring
2020-05-12 14:56     ` Geert Uytterhoeven
2020-04-29 21:56 ` [PATCH 18/18] ARM: dts: r8a7742: Add GPIO support Lad Prabhakar
2020-04-30 14:37   ` Geert Uytterhoeven
2020-05-01  8:27 ` [PATCH 00/18] Add R8A7742/RZG1H board support Lad, Prabhakar

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1588197415-13747-7-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com \
    --to=prabhakar.mahadev-lad.rj@bp.renesas.com \
    --cc=bgolaszewski@baylibre.com \
    --cc=devicetree@vger.kernel.org \
    --cc=dmaengine@vger.kernel.org \
    --cc=geert+renesas@glider.be \
    --cc=gregkh@linuxfoundation.org \
    --cc=jason@lakedaemon.net \
    --cc=linus.walleij@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-gpio@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-renesas-soc@vger.kernel.org \
    --cc=linux-serial@vger.kernel.org \
    --cc=linux@armlinux.org.uk \
    --cc=magnus.damm@gmail.com \
    --cc=maz@kernel.org \
    --cc=prabhakar.csengg@gmail.com \
    --cc=robh+dt@kernel.org \
    --cc=tglx@linutronix.de \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).