From: Stephen Boyd <swboyd@chromium.org>
To: Rajendra Nayak <rnayak@codeaurora.org>,
agross@kernel.org, bjorn.andersson@linaro.org,
robdclark@chromium.org, robdclark@gmail.com,
stanimir.varbanov@linaro.org
Cc: viresh.kumar@linaro.org, mka@chromium.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
Rajendra Nayak <rnayak@codeaurora.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Akash Asthana <akashast@codeaurora.org>,
linux-serial@vger.kernel.org
Subject: Re: [PATCH v6 1/6] tty: serial: qcom_geni_serial: Use OPP API to set clk/perf state
Date: Mon, 29 Jun 2020 16:17:25 -0700 [thread overview]
Message-ID: <159347264530.1987609.11350620235820019545@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <1592222564-13556-2-git-send-email-rnayak@codeaurora.org>
Quoting Rajendra Nayak (2020-06-15 05:02:39)
> diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c
> index 457c0bf..a90f8ec 100644
> --- a/drivers/tty/serial/qcom_geni_serial.c
> +++ b/drivers/tty/serial/qcom_geni_serial.c
> @@ -9,6 +9,7 @@
> #include <linux/module.h>
> #include <linux/of.h>
> #include <linux/of_device.h>
> +#include <linux/pm_opp.h>
> #include <linux/platform_device.h>
> #include <linux/pm_runtime.h>
> #include <linux/pm_wakeirq.h>
> @@ -962,7 +963,7 @@ static void qcom_geni_serial_set_termios(struct uart_port *uport,
> goto out_restart_rx;
>
> uport->uartclk = clk_rate;
> - clk_set_rate(port->se.clk, clk_rate);
> + dev_pm_opp_set_rate(uport->dev, clk_rate);
If there isn't an OPP table for the device because it is optional then
how can we unconditionally call dev_pm_opp_set_rate()?
> ser_clk_cfg = SER_CLK_EN;
> ser_clk_cfg |= clk_div << CLK_DIV_SHFT;
>
> @@ -1231,8 +1232,11 @@ static void qcom_geni_serial_pm(struct uart_port *uport,
> if (new_state == UART_PM_STATE_ON && old_state == UART_PM_STATE_OFF)
> geni_se_resources_on(&port->se);
> else if (new_state == UART_PM_STATE_OFF &&
> - old_state == UART_PM_STATE_ON)
> + old_state == UART_PM_STATE_ON) {
> + /* Drop the performance state vote */
> + dev_pm_opp_set_rate(uport->dev, 0);
> geni_se_resources_off(&port->se);
> + }
> }
>
> static const struct uart_ops qcom_geni_console_pops = {
> @@ -1351,13 +1355,25 @@ static int qcom_geni_serial_probe(struct platform_device *pdev)
> if (of_property_read_bool(pdev->dev.of_node, "cts-rts-swap"))
> port->cts_rts_swap = true;
>
> + port->se.opp_table = dev_pm_opp_set_clkname(&pdev->dev, "se");
> + if (IS_ERR(port->se.opp_table))
> + return PTR_ERR(port->se.opp_table);
> + /* OPP table is optional */
> + ret = dev_pm_opp_of_add_table(&pdev->dev);
> + if (!ret) {
> + port->se.has_opp_table = true;
> + } else if (ret != -ENODEV) {
> + dev_err(&pdev->dev, "invalid OPP table in device tree\n");
> + return ret;
> + }
At least it looks optional here.
next prev parent reply other threads:[~2020-06-29 23:17 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1592222564-13556-1-git-send-email-rnayak@codeaurora.org>
2020-06-15 12:02 ` [PATCH v6 1/6] tty: serial: qcom_geni_serial: Use OPP API to set clk/perf state Rajendra Nayak
2020-06-25 5:08 ` Bjorn Andersson
2020-06-30 12:16 ` Rajendra Nayak
2020-06-29 23:17 ` Stephen Boyd [this message]
2020-06-30 3:01 ` Rajendra Nayak
2020-06-30 3:05 ` Viresh Kumar
2020-07-21 8:43 ` Stephen Boyd
2020-07-22 5:24 ` Viresh Kumar
2020-08-20 10:45 ` Viresh Kumar
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