From: Kumaravel Thiagarajan <kumaravel.thiagarajan@microchip.com>
To: <linux-kernel@vger.kernel.org>
Cc: <linux-serial@vger.kernel.org>, <gregkh@linuxfoundation.org>,
<jirislaby@kernel.org>, <ilpo.jarvinen@linux.intel.com>,
<macro@orcam.me.uk>, <andriy.shevchenko@linux.intel.com>,
<lukas@wunner.de>, <cang1@live.co.uk>,
<matthew.gerlach@linux.intel.com>, <deller@gmx.de>,
<phil.edworthy@renesas.com>, <geert+renesas@glider.be>,
<marpagan@redhat.com>, <u.kleine-koenig@pengutronix.de>,
<etremblay@distech-controls.com>, <wander@redhat.com>,
Tharun Kumar P <tharunkumar.pasumarthi@microchip.com>
Subject: [PATCH v11 tty-next 3/4] serial: 8250_pci1xxxx: Add RS485 support to quad-uart driver
Date: Sat, 4 Feb 2023 11:01:37 +0530 [thread overview]
Message-ID: <20230204053138.2520105-4-kumaravel.thiagarajan@microchip.com> (raw)
In-Reply-To: <20230204053138.2520105-1-kumaravel.thiagarajan@microchip.com>
pci1xxxx uart supports RS485 mode of operation in the hardware with
auto-direction control with configurable delay for releasing RTS after
the transmission. This patch adds support for the RS485 mode.
Co-developed-by: Tharun Kumar P <tharunkumar.pasumarthi@microchip.com>
Signed-off-by: Tharun Kumar P <tharunkumar.pasumarthi@microchip.com>
Signed-off-by: Kumaravel Thiagarajan <kumaravel.thiagarajan@microchip.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
Changes in v11:
- No Change
Changes in v10:
- No Change
Changes in v9:
- No Change
Changes in v8:
- Modified datatype of delay_in_baud_periods to u32
Changes in v7:
- No Change
Changes in v6:
- Modified datatype of delay_in_baud_periods to u64 to avoid overflows
Changes in v5:
- Removed unnecessary assignments
- Corrected styling issues in comments
Changes in v4:
- No Change
Changes in v3:
- Remove flags sanitization in driver which is taken care in core
Changes in v2:
- move pci1xxxx_rs485_config to a separate patch with
pci1xxxx_rs485_supported.
---
drivers/tty/serial/8250/8250_pci1xxxx.c | 50 +++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/drivers/tty/serial/8250/8250_pci1xxxx.c b/drivers/tty/serial/8250/8250_pci1xxxx.c
index ea04c014edb9..58f47d18f7d8 100644
--- a/drivers/tty/serial/8250/8250_pci1xxxx.c
+++ b/drivers/tty/serial/8250/8250_pci1xxxx.c
@@ -164,6 +164,54 @@ static void pci1xxxx_set_divisor(struct uart_port *port, unsigned int baud,
port->membase + UART_BAUD_CLK_DIVISOR_REG);
}
+static int pci1xxxx_rs485_config(struct uart_port *port,
+ struct ktermios *termios,
+ struct serial_rs485 *rs485)
+{
+ u32 delay_in_baud_periods;
+ u32 baud_period_in_ns;
+ u32 mode_cfg = 0;
+ u32 clock_div;
+
+ /*
+ * pci1xxxx's uart hardware supports only RTS delay after
+ * Tx and in units of bit times to a maximum of 15
+ */
+ if (rs485->flags & SER_RS485_ENABLED) {
+ mode_cfg = ADCL_CFG_EN | ADCL_CFG_PIN_SEL;
+
+ if (!(rs485->flags & SER_RS485_RTS_ON_SEND))
+ mode_cfg |= ADCL_CFG_POL_SEL;
+
+ if (rs485->delay_rts_after_send) {
+ clock_div = readl(port->membase + UART_BAUD_CLK_DIVISOR_REG);
+ baud_period_in_ns =
+ FIELD_GET(BAUD_CLOCK_DIV_INT_MSK, clock_div) *
+ UART_BIT_SAMPLE_CNT;
+ delay_in_baud_periods =
+ rs485->delay_rts_after_send * NSEC_PER_MSEC /
+ baud_period_in_ns;
+ delay_in_baud_periods =
+ min_t(u32, delay_in_baud_periods,
+ FIELD_MAX(ADCL_CFG_RTS_DELAY_MASK));
+ mode_cfg |= FIELD_PREP(ADCL_CFG_RTS_DELAY_MASK,
+ delay_in_baud_periods);
+ rs485->delay_rts_after_send =
+ baud_period_in_ns * delay_in_baud_periods /
+ NSEC_PER_MSEC;
+ }
+ }
+ writel(mode_cfg, port->membase + ADCL_CFG_REG);
+ return 0;
+}
+
+static const struct serial_rs485 pci1xxxx_rs485_supported = {
+ .flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND |
+ SER_RS485_RTS_AFTER_SEND,
+ .delay_rts_after_send = 1,
+ /* Delay RTS before send is not supported */
+};
+
static int pci1xxxx_setup(struct pci_dev *pdev,
struct uart_8250_port *port, int port_idx)
{
@@ -174,6 +222,8 @@ static int pci1xxxx_setup(struct pci_dev *pdev,
port->port.set_termios = serial8250_do_set_termios;
port->port.get_divisor = pci1xxxx_get_divisor;
port->port.set_divisor = pci1xxxx_set_divisor;
+ port->port.rs485_config = pci1xxxx_rs485_config;
+ port->port.rs485_supported = pci1xxxx_rs485_supported;
ret = serial8250_pci_setup_port(pdev, port, 0, PORT_OFFSET * port_idx, 0);
if (ret < 0)
--
2.25.1
next prev parent reply other threads:[~2023-02-03 16:57 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-04 5:31 [PATCH v11 tty-next 0/4] serial: 8250_pci1xxxx: Add driver for the pci1xxxx's quad-uart function Kumaravel Thiagarajan
2023-02-04 5:31 ` [PATCH v11 tty-next 1/4] serial: 8250_pci: Add serial8250_pci_setup_port definition in 8250_pcilib.c Kumaravel Thiagarajan
2023-02-04 5:30 ` kernel test robot
2023-02-05 0:59 ` kernel test robot
2023-02-06 11:40 ` Andy Shevchenko
2023-02-06 11:41 ` Andy Shevchenko
2023-02-04 5:31 ` [PATCH v11 tty-next 2/4] serial: 8250_pci1xxxx: Add driver for quad-uart support Kumaravel Thiagarajan
2023-02-04 5:31 ` Kumaravel Thiagarajan [this message]
2023-02-04 5:31 ` [PATCH v11 tty-next 4/4] serial: 8250_pci1xxxx: Add power management functions to quad-uart driver Kumaravel Thiagarajan
2023-02-06 11:37 ` [PATCH v11 tty-next 0/4] serial: 8250_pci1xxxx: Add driver for the pci1xxxx's quad-uart function Andy Shevchenko
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