From: Mikulas Patocka <mpatocka@redhat.com>
To: Richard Henderson <rth@twiddle.net>,
Ivan Kokshaysky <ink@jurassic.park.msu.ru>,
Matt Turner <mattst88@gmail.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-alpha@vger.kernel.org, Sinan Kaya <okaya@codeaurora.org>,
Arnd Bergmann <arnd@arndb.de>,
linux-serial@vger.kernel.org, linux-rtc@vger.kernel.org
Subject: [PATCH 1/2] alpha: add a delay between RTC port write and read
Date: Wed, 6 May 2020 07:21:43 -0400 (EDT) [thread overview]
Message-ID: <alpine.LRH.2.02.2005060713390.25338@file01.intranet.prod.int.rdu2.redhat.com> (raw)
The patch 92d7223a74235054f2aa7227d207d9c57f84dca0 ("alpha: io: reorder
barriers to guarantee writeX() and iowriteX() ordering #2") broke boot on
the Alpha Avanti platform.
The patch changes timing between accesses to the ISA bus, in particular,
it reduces the time between "write" access and a subsequent "read" access.
This causes lock-up when accessing the real time clock and serial ports.
This patch fixes the real time clock by adding a small delay between
outb_p and inb_p.
Note that we don't have to add the delay to CMOS_WRITE, because it
consists of two write accesses and they already have mb() between them.
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Fixes: 92d7223a7423 ("alpha: io: reorder barriers to guarantee writeX() and iowriteX() ordering #2")
Cc: stable@vger.kernel.org # v4.17+
---
arch/alpha/include/asm/mc146818rtc.h | 4 ++++
1 file changed, 4 insertions(+)
Index: linux-stable/arch/alpha/include/asm/mc146818rtc.h
===================================================================
--- linux-stable.orig/arch/alpha/include/asm/mc146818rtc.h 2020-05-05 20:48:30.000000000 +0200
+++ linux-stable/arch/alpha/include/asm/mc146818rtc.h 2020-05-05 21:05:53.000000000 +0200
@@ -15,9 +15,13 @@
/*
* The yet supported machines all access the RTC index register via
* an ISA port access but the way to access the date register differs ...
+ *
+ * The ISA bus on Alpha Avanti doesn't like back-to-back accesses,
+ * we need to add a small delay.
*/
#define CMOS_READ(addr) ({ \
outb_p((addr),RTC_PORT(0)); \
+udelay(2); \
inb_p(RTC_PORT(1)); \
})
#define CMOS_WRITE(val, addr) ({ \
next reply other threads:[~2020-05-06 11:21 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-06 11:21 Mikulas Patocka [this message]
2020-05-06 14:20 ` [PATCH 1/2] alpha: add a delay between RTC port write and read Arnd Bergmann
2020-05-06 17:12 ` [PATCH 1/2 v2] alpha: add a delay to inb_p, inb_w and inb_l Mikulas Patocka
2020-05-07 8:06 ` [PATCH 1/2 v3] " Mikulas Patocka
2020-05-07 8:20 ` Greg Kroah-Hartman
2020-05-07 10:53 ` Mikulas Patocka
2020-05-07 13:30 ` Arnd Bergmann
2020-05-07 14:09 ` Mikulas Patocka
2020-05-07 15:08 ` Arnd Bergmann
2020-05-07 15:45 ` Mikulas Patocka
2020-05-07 15:46 ` [PATCH v4] alpha: add a barrier after outb, outw and outl Mikulas Patocka
2020-05-07 19:12 ` Arnd Bergmann
2020-05-10 1:27 ` Maciej W. Rozycki
2020-05-10 1:25 ` [PATCH 1/2 v3] alpha: add a delay to inb_p, inb_w and inb_l Maciej W. Rozycki
2020-05-10 18:50 ` Mikulas Patocka
2020-05-11 14:58 ` Maciej W. Rozycki
2020-05-12 19:35 ` Mikulas Patocka
2020-05-13 14:41 ` Ivan Kokshaysky
2020-05-13 16:13 ` Greg Kroah-Hartman
2020-05-13 17:17 ` Maciej W. Rozycki
2020-05-22 13:03 ` Mikulas Patocka
2020-05-22 13:37 ` Maciej W. Rozycki
2020-05-22 13:26 ` Mikulas Patocka
2020-05-22 20:00 ` Mikulas Patocka
2020-05-23 10:26 ` [PATCH v4] alpha: fix memory barriers so that they conform to the specification Mikulas Patocka
2020-05-23 15:10 ` Ivan Kokshaysky
2020-05-23 15:34 ` Mikulas Patocka
2020-05-23 15:37 ` [PATCH v5] " Mikulas Patocka
2020-05-24 14:54 ` Maciej W. Rozycki
2020-05-25 13:56 ` Mikulas Patocka
2020-05-25 14:07 ` Arnd Bergmann
2020-05-25 14:45 ` Maciej W. Rozycki
2020-05-25 15:53 ` [PATCH v6] " Mikulas Patocka
2020-05-26 14:47 ` [PATCH v7] " Mikulas Patocka
2020-05-27 0:18 ` Maciej W. Rozycki
2020-06-08 6:58 ` Mikulas Patocka
2020-06-08 23:49 ` Matt Turner
2020-05-25 15:54 ` [PATCH v5] " Mikulas Patocka
2020-05-25 16:39 ` Maciej W. Rozycki
2020-05-26 14:48 ` Mikulas Patocka
2020-05-27 0:23 ` Maciej W. Rozycki
2020-05-23 16:44 ` [PATCH v4] " Maciej W. Rozycki
2020-05-23 17:09 ` Mikulas Patocka
2020-05-23 19:27 ` Maciej W. Rozycki
2020-05-23 20:11 ` Mikulas Patocka
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