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From: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
To: Vineet Gupta <Vineet.Gupta1@synopsys.com>,
	"linux-snps-arc@lists.infradead.org"
	<linux-snps-arc@lists.infradead.org>
Cc: Alexey  Brodkin <Alexey.Brodkin@synopsys.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 4/5] ARC: add support for DSP-enabled userspace applications
Date: Wed, 4 Mar 2020 11:51:17 +0000	[thread overview]
Message-ID: <BY5PR12MB4034D0D8EDD029E90642012EDEE50@BY5PR12MB4034.namprd12.prod.outlook.com> (raw)
In-Reply-To: <a3890ccb-e948-6ad6-c2ea-5b77b9d3a289@synopsys.com>

Hi Vineet,

>From: Vineet Gupta <vgupta@synopsys.com>
>Sent: Tuesday, January 7, 2020 21:25
>To: Eugeniy Paltsev; linux-snps-arc@lists.infradead.org
>Cc: linux-kernel@vger.kernel.org; Alexey Brodkin
>Subject: Re: [PATCH 4/5] ARC: add support for DSP-enabled userspace applications
>> +/*
>> + * As we save new and restore old AUX register value in the same place we
>> + * can optimize a bit and use AEX instruction (swap contents of an auxiliary
>> + * register with a core register) instead of LR + SR pair.
>> + */
>> +#define AUX_SAVE_RESTORE(_saveto, _readfrom, _offt, _aux, _scratch)  \
>> +do {                                                                 \
>> +     __asm__ __volatile__(                                           \
>> +             "ld     %0, [%2, %4]                    \n"             \
>> +             "aex    %0, [%3]                        \n"             \
>> +             "st     %0, [%1, %4]                    \n"             \
>> +             :                                                       \
>> +               "=&r" (_scratch)      /* must be early clobber */     \
>> +             :                                                       \
>> +                "r" (_saveto),                                       \
>> +                "r" (_readfrom),                                     \
>> +                "I" (_aux),                                          \
>> +                "I" (_offt)                                          \
>> +             :                                                       \
>
>AEX with "I" constraint will likely be an 8 byte instructions always. Best to give
>compiler wiggle room with "Ir"

Could you please explain how "Ir" will work in this case?
Does this mean that compiler can pass the value either as constant ('I') or
via register ('r')?

Note that in this case both _aux and _offt are compile-time constants -
_aux comes from define and _offt comes from offsetof().

>> +               "memory"                                              \
>> +     );                                                              \
>> +} while (0)
>> +
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  parent reply	other threads:[~2020-03-04 11:52 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-27 18:03 [RFC 0/5] ARC: handle DSP presence in HW Eugeniy Paltsev
2019-12-27 18:03 ` [PATCH 1/5] ARC: pt_regs: remove hardcoded registers offset Eugeniy Paltsev
2019-12-28 21:06   ` Vineet Gupta
2019-12-27 18:03 ` [PATCH 2/5] ARC: add helpers to sanitize config options Eugeniy Paltsev
2020-01-06 22:47   ` Vineet Gupta
2019-12-27 18:03 ` [PATCH 3/5] ARC: handle DSP presence in HW Eugeniy Paltsev
2020-01-07  1:03   ` Vineet Gupta
2020-01-07  1:30     ` Vineet Gupta
2020-01-10 14:54     ` Eugeniy Paltsev
2020-01-13 16:49       ` Vineet Gupta
2019-12-27 18:03 ` [PATCH 4/5] ARC: add support for DSP-enabled userspace applications Eugeniy Paltsev
2020-01-07 18:25   ` Vineet Gupta
2020-01-09 19:01     ` Eugeniy Paltsev
2020-01-09 22:46       ` Vineet Gupta
2020-03-04 11:51     ` Eugeniy Paltsev [this message]
2020-03-04 17:58       ` Vineet Gupta
2019-12-27 18:03 ` [PATCH 5/5] ARC: allow userspace DSP applications to use AGU extensions Eugeniy Paltsev
2020-01-07 18:30   ` Vineet Gupta

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