From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Mark Brown <broonie@kernel.org>,
Michal Simek <michal.simek@xilinx.com>,
Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>,
Tudor Ambarus <Tudor.Ambarus@microchip.com>,
linux-arm-kernel@lists.infradead.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
linux-spi@vger.kernel.org
Subject: [PATCH v2 0/7] spi: zynq-qspi: Clarify and fix the chip selection
Date: Fri, 8 Nov 2019 15:07:37 +0100 [thread overview]
Message-ID: <20191108140744.1734-1-miquel.raynal@bootlin.com> (raw)
Hello,
While working on SPI-NOR support I figured the chip select handling of
the Zynq 7000 QSPI driver was not behaving as I would have
expected. While cheking out what was wrong I decided to clarify things
around so I did a bit of cleaning. The step-by-step changes are the
reason for patches [1-6]. This way, the last patch actually adding
support for both CS is much more understandable.
Thanks,
Miquèl
Changes since v1:
* Rebased on top of v5.4-rc6 and fixed all the conflicts
(minors). Compile tested only (actual testing done on a v5.1).
Miquel Raynal (7):
spi: zynq-qspi: Anything else than CS0 is not supported yet
spi: zynq-qspi: Keep the naming consistent across the driver
spi: zynq-qspi: Keep the bitfields naming consistent
spi: zynq-qspi: Enhance the Linear CFG bit definitions
spi: zynq-qspi: Clarify the select chip function
spi: zynq-qspi: Do the actual hardware initialization later in the
probe
spi: zynq-qspi: Support two chip selects
drivers/spi/spi-zynq-qspi.c | 83 ++++++++++++++++++++++---------------
1 file changed, 50 insertions(+), 33 deletions(-)
--
2.20.1
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next reply other threads:[~2019-11-08 14:07 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-08 14:07 Miquel Raynal [this message]
2019-11-08 14:07 ` [PATCH v2 1/7] spi: zynq-qspi: Anything else than CS0 is not supported yet Miquel Raynal
2019-11-08 17:45 ` Applied "spi: zynq-qspi: Anything else than CS0 is not supported yet" to the spi tree Mark Brown
2019-11-08 14:07 ` [PATCH v2 2/7] spi: zynq-qspi: Keep the naming consistent across the driver Miquel Raynal
2019-11-08 14:07 ` [PATCH v2 3/7] spi: zynq-qspi: Keep the bitfields naming consistent Miquel Raynal
2019-11-08 17:45 ` Applied "spi: zynq-qspi: Keep the bitfields naming consistent" to the spi tree Mark Brown
2019-11-08 14:07 ` [PATCH v2 4/7] spi: zynq-qspi: Enhance the Linear CFG bit definitions Miquel Raynal
2019-11-08 17:45 ` Applied "spi: zynq-qspi: Enhance the Linear CFG bit definitions" to the spi tree Mark Brown
2019-11-08 14:07 ` [PATCH v2 5/7] spi: zynq-qspi: Clarify the select chip function Miquel Raynal
2019-11-08 17:45 ` Applied "spi: zynq-qspi: Clarify the select chip function" to the spi tree Mark Brown
2019-11-08 14:07 ` [PATCH v2 6/7] spi: zynq-qspi: Do the actual hardware initialization later in the probe Miquel Raynal
2019-11-08 17:45 ` Applied "spi: zynq-qspi: Do the actual hardware initialization later in the probe" to the spi tree Mark Brown
2019-11-08 14:07 ` [PATCH v2 7/7] spi: zynq-qspi: Support two chip selects Miquel Raynal
2019-11-08 17:45 ` Applied "spi: zynq-qspi: Support two chip selects" to the spi tree Mark Brown
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