From: Vladimir Oltean <olteanv@gmail.com>
To: broonie@kernel.org
Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
shawnguo@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com,
devicetree@vger.kernel.org, eha@deif.com, angelo@sysam.it,
andrew.smirnov@gmail.com, gustavo@embeddedor.com,
weic@nvidia.com, mhosny@nvidia.com, michael@walle.cc,
peng.ma@nxp.com
Subject: [PATCH v3 01/12] spi: spi-fsl-dspi: Don't access reserved fields in SPI_MCR
Date: Sun, 15 Mar 2020 00:43:29 +0200 [thread overview]
Message-ID: <20200314224340.1544-2-olteanv@gmail.com> (raw)
In-Reply-To: <20200314224340.1544-1-olteanv@gmail.com>
From: Vladimir Oltean <vladimir.oltean@nxp.com>
The SPI_MCR_PCSIS macro assumes that the controller has a number of chip
select signals equal to 6. That is not always the case, but actually is
described through the driver-specific "spi-num-chipselects" device tree
binding. LS1028A for example only has 4 chip selects.
Don't write to the upper bits of the PCSIS field, which are reserved in
the reference manual.
Fixes: 349ad66c0ab0 ("spi:Add Freescale DSPI driver for Vybrid VF610 platform")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
Changes in v4:
None.
Changes in v3:
None.
Changes in v2:
Remove duplicate phrase in commit message.
drivers/spi/spi-fsl-dspi.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c
index 50e3382f0c50..6ca35881881b 100644
--- a/drivers/spi/spi-fsl-dspi.c
+++ b/drivers/spi/spi-fsl-dspi.c
@@ -22,7 +22,7 @@
#define SPI_MCR 0x00
#define SPI_MCR_MASTER BIT(31)
-#define SPI_MCR_PCSIS (0x3F << 16)
+#define SPI_MCR_PCSIS(x) ((x) << 16)
#define SPI_MCR_CLR_TXF BIT(11)
#define SPI_MCR_CLR_RXF BIT(10)
#define SPI_MCR_XSPI BIT(3)
@@ -1200,7 +1200,10 @@ static const struct regmap_config dspi_xspi_regmap_config[] = {
static void dspi_init(struct fsl_dspi *dspi)
{
- unsigned int mcr = SPI_MCR_PCSIS;
+ unsigned int mcr;
+
+ /* Set idle states for all chip select signals to high */
+ mcr = SPI_MCR_PCSIS(GENMASK(dspi->ctlr->num_chipselect - 1, 0));
if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE)
mcr |= SPI_MCR_XSPI;
--
2.17.1
next prev parent reply other threads:[~2020-03-14 22:43 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-14 22:43 [PATCH v3 00/12] NXP DSPI bugfixes and support for LS1028A Vladimir Oltean
2020-03-14 22:43 ` Vladimir Oltean [this message]
2020-03-14 22:43 ` [PATCH v3 06/12] spi: spi-fsl-dspi: Replace interruptible wait queue with a simple completion Vladimir Oltean
2020-03-16 12:26 ` Mark Brown
[not found] ` <20200316122613.GE5010-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2020-03-16 12:29 ` Vladimir Oltean
[not found] ` <CA+h21hqRV+HmAz4QGyH9ZtcFWzeCKczitcn+mfTdwAC7ZobdDw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2020-03-16 12:49 ` Mark Brown
2020-03-16 13:00 ` Vladimir Oltean
[not found] ` <CA+h21hpoHGuDwpOqtWJFO7+0mQVUrmcBLW7nnGq6dt3QU5axfw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2020-03-16 13:25 ` Michael Walle
2020-03-16 16:23 ` Vladimir Oltean
[not found] ` <CA+h21hqt7Xe1LrSDsCVS8zqunQp2tKGhmHDraMirxL595go4nA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2020-03-16 17:15 ` Michael Walle
[not found] ` <8c22cb70b7c0acb6769e0c68540ab523-QKn5cuLxLXY@public.gmane.org>
2020-03-17 11:24 ` Michael Walle
2020-03-14 22:43 ` [PATCH v3 07/12] spi: spi-fsl-dspi: Avoid NULL pointer in dspi_slave_abort for non-DMA mode Vladimir Oltean
[not found] ` <20200314224340.1544-1-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-03-14 22:43 ` [PATCH v3 02/12] spi: spi-fsl-dspi: Fix little endian access to PUSHR CMD and TXDATA Vladimir Oltean
2020-03-14 22:43 ` [PATCH v3 03/12] spi: spi-fsl-dspi: Fix bits-per-word acceleration in DMA mode Vladimir Oltean
2020-03-14 22:43 ` [PATCH v3 04/12] spi: spi-fsl-dspi: Avoid reading more data than written in EOQ mode Vladimir Oltean
2020-03-14 22:43 ` [PATCH v3 05/12] spi: spi-fsl-dspi: Protect against races on dspi->words_in_flight Vladimir Oltean
[not found] ` <20200314224340.1544-6-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-03-16 12:35 ` Vladimir Oltean
2020-03-14 22:43 ` [PATCH v3 08/12] spi: spi-fsl-dspi: Fix interrupt-less DMA mode taking an XSPI code path Vladimir Oltean
2020-03-14 22:43 ` [PATCH v3 09/12] spi: spi-fsl-dspi: Move invariant configs out of dspi_transfer_one_message Vladimir Oltean
2020-03-14 22:43 ` [PATCH v3 10/12] spi: spi-fsl-dspi: Add support for LS1028A Vladimir Oltean
2020-03-14 22:43 ` [PATCH v3 11/12] arm64: dts: ls1028a: Specify the DMA channels for the DSPI controllers Vladimir Oltean
2020-03-14 22:43 ` [PATCH v3 12/12] arm64: dts: ls1028a-rdb: Add a spidev node for the mikroBUS Vladimir Oltean
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200314224340.1544-2-olteanv@gmail.com \
--to=olteanv@gmail.com \
--cc=andrew.smirnov@gmail.com \
--cc=angelo@sysam.it \
--cc=broonie@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=eha@deif.com \
--cc=gustavo@embeddedor.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-spi@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=mhosny@nvidia.com \
--cc=michael@walle.cc \
--cc=peng.ma@nxp.com \
--cc=robh+dt@kernel.org \
--cc=shawnguo@kernel.org \
--cc=weic@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).