linux-spi.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Mark Brown <broonie@kernel.org>
To: "Ramuthevar,Vadivel MuruganX" 
	<vadivel.muruganx.ramuthevar@linux.intel.com>
Cc: vigneshr@ti.com, tudor.ambarus@microchip.com,
	linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
	robh+dt@kernel.org, devicetree@vger.kernel.org,
	miquel.raynal@bootlin.com, simon.k.r.goldschmidt@gmail.com,
	dinguyen@kernel.org, richard@nod.at, cheol.yong.kim@intel.com,
	qi-ming.wu@intel.com
Subject: Re: [PATCH v1 4/6] spi: cadence-quadspi: Add QSPI support for Intel LGM SoC
Date: Fri, 16 Oct 2020 17:33:18 +0100	[thread overview]
Message-ID: <20201016163318.GI5274@sirena.org.uk> (raw)
In-Reply-To: <20201016093138.28871-5-vadivel.muruganx.ramuthevar@linux.intel.com>

[-- Attachment #1: Type: text/plain, Size: 530 bytes --]

On Fri, Oct 16, 2020 at 05:31:36PM +0800, Ramuthevar,Vadivel MuruganX wrote:

> +	depends on OF && (ARM || ARM64 || X86 || COMPILE_TEST)

> +	{
> +		.compatible = "intel,lgm-qspi",
> +	},

This is an x86 SoC (or SoC series) - is it really going to use DT for
the firmware interfaces?  It's not specifically a problem, just
surprising to see something other than ACPI.  Or is the intention to use
PRP0001?  There's a new comaptible here which wasn't really the use case
for PRP0001.  Like I say not really a problem, just curious.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

  reply	other threads:[~2020-10-16 16:33 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-16  9:31 [PATCH v1 0/6] spi: cadence-quadspi: Add QSPI controller support for Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-10-16  9:31 ` [PATCH v1 1/6] spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi Ramuthevar,Vadivel MuruganX
2020-10-19 21:26   ` Rob Herring
2020-10-20  7:01     ` Ramuthevar, Vadivel MuruganX
2020-10-16  9:31 ` [PATCH v1 2/6] dt-bindings: spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml Ramuthevar,Vadivel MuruganX
2020-10-16 16:18   ` Mark Brown
2020-10-19  6:22     ` Ramuthevar, Vadivel MuruganX
2020-10-19 21:35   ` Rob Herring
2020-10-20  7:05     ` Ramuthevar, Vadivel MuruganX
2020-10-16  9:31 ` [PATCH v1 3/6] dt-bindings: spi: Add compatible for Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-10-16  9:31 ` [PATCH v1 4/6] spi: cadence-quadspi: Add QSPI support " Ramuthevar,Vadivel MuruganX
2020-10-16 16:33   ` Mark Brown [this message]
2020-10-19  6:26     ` Ramuthevar, Vadivel MuruganX
2020-10-16  9:31 ` [PATCH v1 5/6] spi: cadence-quadspi: Disable the DAC " Ramuthevar,Vadivel MuruganX
2020-10-16  9:31 ` [PATCH v1 6/6] spi: cadence-quadspi: Add multi-chipselect support " Ramuthevar,Vadivel MuruganX

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20201016163318.GI5274@sirena.org.uk \
    --to=broonie@kernel.org \
    --cc=cheol.yong.kim@intel.com \
    --cc=devicetree@vger.kernel.org \
    --cc=dinguyen@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-spi@vger.kernel.org \
    --cc=miquel.raynal@bootlin.com \
    --cc=qi-ming.wu@intel.com \
    --cc=richard@nod.at \
    --cc=robh+dt@kernel.org \
    --cc=simon.k.r.goldschmidt@gmail.com \
    --cc=tudor.ambarus@microchip.com \
    --cc=vadivel.muruganx.ramuthevar@linux.intel.com \
    --cc=vigneshr@ti.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).