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From: "Andrea Paterniani" <a.paterniani-03BXCEkGbFHYGGNLXY5/rw@public.gmane.org>
To: "llandre" <r&d2-4VKA1VU3ct/j+vYz1yj4TQ@public.gmane.org>
Cc: David Brownell <david-b-yBeKhBN/0LDR7s880joybQ@public.gmane.org>,
	spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org
Subject: R: spi_async and heavy CPU occupation by ksoftirqd
Date: Fri, 10 Aug 2007 14:27:42 +0200	[thread overview]
Message-ID: <FLEPLOLKEPNLMHOILNHPIEKIDKAA.a.paterniani@swapp-eng.it> (raw)
In-Reply-To: <46BC4CD3.5090304-4VKA1VU3ct/j+vYz1yj4TQ@public.gmane.org>

You're right the current version of the driver doesn't support RDY control.
Infact SPI_DEFAULT_CONTROL is defined with SPI_CONTROL_DRCTL_0.
Also setup function doesn't managed DRCTL changes.

Then you probably changes SPI_DEFAULT_CONTROL to use SPI_CONTROL_DRCTL_2.

Please do your suggestions for driver modification in order to release a driver patch.

- Andrea



> -----Messaggio originale-----
> Da: llandre [mailto:r&d2-4VKA1VU3ct/j+vYz1yj4TQ@public.gmane.org]
> Inviato: venerdì 10 agosto 2007 13.33
> A: Andrea Paterniani
> Cc: David Brownell; spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org
> Oggetto: Re: [spi-devel-general] spi_async and heavy CPU occupation by
> ksoftirqd
>
>
> I think I found the cause.
> Since I needed to enable the RDY control (SPI_CONTROL_DRCTL_2) as
> required by the SPI slave (Quantum QT510), the actual SPI transactions
> may occur after the driver wrote the TX FIFO (if (write(drv_data))).
> Thus
>
> while ((read(drv_data) == 0) && limit--);
>
> waits until the actual transaction have been completed, that happens
> when the slave is ready to accept data.
> So I'm afraid I need modify the MXL driver in order to support this case.
>
> --
> llandre
>
> DAVE Electronics System House - R&D Department
> web:   http://www.dave-tech.it
> email: r&d2-4VKA1VU3ct/j+vYz1yj4TQ@public.gmane.org
>
>
> > Is there any logged error message?
> > May be that limit reaches 0 but in this case an error is logged (trailing bytes read failed).
> >
> > - Andrea
> >
> >
> >
> >
> >
> >> -----Messaggio originale-----
> >> Da: llandre [mailto:r&d2-4VKA1VU3ct/j+vYz1yj4TQ@public.gmane.org]
> >> Inviato: venerdì 10 agosto 2007 10.52
> >> A: David Brownell
> >> Cc: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org; Andrea Paterniani
> >> Oggetto: Re: [spi-devel-general] spi_async and heavy CPU occupation by
> >> ksoftirqd
> >>
> >>
> >>> That seems to be the most precise tool you have, unless you
> >>> have access to the JTAG-style hardware tools giving access
> >>> to the on-chip instruction trace buffers found in many ARMs.
> >> Unfortunatley trace port is not available so I have to use the old
> >> fashioned debug pin technique.
> >>
> >>>> or does the kernel provides some
> >>>> tools to do that? Could oprofile come to help?
> >>> Statistical profiling probably wouldn't help.  I'm not sure that
> >>> anything like gprof is working in the kernel.  Folk that I know
> >>> have done that level analysis tend to rely on hardware trace tools.
> >> I see.
> >>
> >>>>> I'd expect that using spi_sync() wouldn't save much, but it might
> >>>>> be worth verifying that.
> >>>> Initially my driver used spi_sync. When I realized the huge CPU
> >>>> occupation I modified it in order to use spi_async instead but, again,
> >>>> nothing changed.
> >>> And that should have been a HUGE clue that the way you were calling
> >>> it wasn't a factor at all.
> >> I moved the set/clear pin functions inside the iMXL master driver and I
> >> found the problem is at line 804 inside the interrupt handler:
> >>
> >> 	qt510_debug_pin(1);
> >> 	while ((read(drv_data) == 0) && limit--);
> >> 	qt510_debug_pin(0);
> >>
> >> Usually the high pulse lasts about 10ms. Occasionally (about 1 time out
> >> of 3) it lasts about 300 ms ! That would explain the ksoftirqd abnormal
> >> CPU occupation.
> >> I hope Andrea can come to help.
> >>
> >>
> >>
> >> --
> >> llandre
> >>
> >> DAVE Electronics System House - R&D Department
> >> web:   http://www.dave-tech.it
> >> email: r&d2-4VKA1VU3ct/j+vYz1yj4TQ@public.gmane.org
> >
> >
> >
>
>


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  parent reply	other threads:[~2007-08-10 12:27 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-08-08  8:21 spi_async and heavy CPU occupation by ksoftirqd llandre
     [not found] ` <46B97D01.5000208-4VKA1VU3ct/j+vYz1yj4TQ@public.gmane.org>
2007-08-08 16:27   ` David Brownell
     [not found]     ` <200708080927.36737.david-b-yBeKhBN/0LDR7s880joybQ@public.gmane.org>
2007-08-09 14:05       ` llandre
     [not found]         ` <46BB1F10.3030608-4VKA1VU3ct/j+vYz1yj4TQ@public.gmane.org>
2007-08-09 15:23           ` David Brownell
     [not found]             ` <200708090823.29708.david-b-yBeKhBN/0LDR7s880joybQ@public.gmane.org>
2007-08-10  8:52               ` llandre
     [not found]                 ` <46BC2732.5070504-4VKA1VU3ct/j+vYz1yj4TQ@public.gmane.org>
2007-08-10 10:29                   ` Andrea Paterniani
     [not found]                     ` <FLEPLOLKEPNLMHOILNHPMEKGDKAA.a.paterniani-03BXCEkGbFHYGGNLXY5/rw@public.gmane.org>
2007-08-10 11:32                       ` llandre
     [not found]                         ` <46BC4CD3.5090304-4VKA1VU3ct/j+vYz1yj4TQ@public.gmane.org>
2007-08-10 12:27                           ` Andrea Paterniani [this message]
     [not found]                             ` <FLEPLOLKEPNLMHOILNHPIEKIDKAA.a.paterniani-03BXCEkGbFHYGGNLXY5/rw@public.gmane.org>
2007-08-14  8:29                               ` R: " llandre
     [not found]                                 ` <46C167F0.4040100-4VKA1VU3ct/j+vYz1yj4TQ@public.gmane.org>
2007-08-14  9:43                                   ` llandre
2007-08-16  7:40 apaterniani.swapp-IWqWACnzNjyonA0d6jMUrA

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