From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sunny Luo Subject: Re: [PATCH v2 3/3] spi: meson-axg: add a linear clock divider support Date: Thu, 13 Dec 2018 22:37:07 +0800 Message-ID: References: <1544690354-16409-1-git-send-email-sunny.luo@amlogic.com> <1544690354-16409-4-git-send-email-sunny.luo@amlogic.com> <3cc699dc-4021-b993-2b47-b00b40f380f8@baylibre.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Cc: Jianxin Pan , Kevin Hilman , Yixun Lan , linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Carlo Caione , linux-amlogic@lists.infradead.org, Xingyu Chen To: Jerome Brunet , Neil Armstrong , Mark Brown Return-path: In-Reply-To: Content-Language: en-GB List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org List-Id: linux-spi.vger.kernel.org Hi Jerome, On 2018/12/13 17:28, Jerome Brunet wrote: > On Thu, 2018-12-13 at 09:55 +0100, Neil Armstrong wrote: >>> diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig >>> config SPI_MESON_SPICC >>> tristate "Amlogic Meson SPICC controller" >>> - depends on ARCH_MESON || COMPILE_TEST >>> + depends on OF && COMMON_CLK && (ARCH_MESON || COMPILE_TEST) > > The purpose of this patch is clock, right ? Why does it add a dependency on OF > ? > I did it by the way. Maybe it's better to add it in patch 1. >>> +static int meson_spicc_clk_init(struct meson_spicc_device *spicc) >>> +{ >>> + struct device *dev = &spicc->pdev->dev; >>> + struct clk_fixed_factor *div0; >>> + struct clk_divider *div1; > > Could you come up with something better than div0 and div1 ? it is confusing, > especially with the comment above about div3 and 4 ... fixed_factor, div maybe > ? > Good, It is really confusing, I will change next patch. >>> + div1 = &meson_spicc_div1; >>> + div1->reg = spicc->base + (u64)div1->reg; > > So you have static data which you override here. This works only if there is a > single instance ... and does not really improve readability in your case. > > IMO, you'd be better off without the static data above. This is a terrible bug for more than one instances. I must overwrite it. >>> + if (!spicc->data->has_enhance_clk_div) { > > Do all SoC with 'has_oen' have 'has_enhance_clk_div' too ? > DO you really need two flags ? Yes, all Soc with 'has_oen' must have 'has_enhance_clk_div' too. It is distinct to use two flags here, what do you think of it? >>> + mux = &meson_spicc_sel; >>> + snprintf(name, sizeof(name), "%s#_sel", dev_name(dev)); >>> + init.name = name; >>> + init.ops = &clk_mux_ops; >>> + init.parent_names = mux_parent_names; >>> + init.num_parents = 2; >>> + init.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT; > > Why CLK_SET_RATE_NO_REPARENT ? CCF should pick the parent that give the best > results, best to let it do its task ... > There are two div in AXG, one is the coarse old-div and the other is enhance-div. From SoCs designer's opinion, the ehance-div aims to take place of the old-div.