From: Roman Beranek <roman.beranek@prusa3d.cz>
To: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Cc: Thierry Reding <thierry.reding@gmail.com>,
Emil Lenngren <emil.lenngren@gmail.com>,
Pascal Roeleven <dev@pascalroeleven.nl>,
Lee Jones <lee.jones@linaro.org>,
Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-sunxi@googlegroups.com
Subject: [PATCH 4/6] pwm: sun4i: simplify calculation of the delay time
Date: Mon, 31 May 2021 06:46:06 +0200 [thread overview]
Message-ID: <20210531044608.1006024-5-roman.beranek@prusa3d.com> (raw)
In-Reply-To: <20210531044608.1006024-1-roman.beranek@prusa3d.com>
There's no reason to expect a single jiffy has passed since writing
the CTRL register except if a preemption has occured in the meantime.
Avoid introducing unnecessary complexity and simply wait for the whole
period.
Signed-off-by: Roman Beranek <roman.beranek@prusa3d.com>
---
drivers/pwm/pwm-sun4i.c | 17 ++---------------
1 file changed, 2 insertions(+), 15 deletions(-)
diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c
index b3ec59a83d00..8218173ce3f6 100644
--- a/drivers/pwm/pwm-sun4i.c
+++ b/drivers/pwm/pwm-sun4i.c
@@ -14,7 +14,6 @@
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/io.h>
-#include <linux/jiffies.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
@@ -89,7 +88,6 @@ struct sun4i_pwm_chip {
void __iomem *base;
struct mutex ctrl_lock;
const struct sun4i_pwm_data *data;
- unsigned long next_period[2];
};
static inline struct sun4i_pwm_chip *to_sun4i_pwm_chip(struct pwm_chip *chip)
@@ -242,8 +240,7 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
struct pwm_state cstate;
u32 ctrl, duty = 0, period = 0, val;
int ret;
- unsigned int delay_us, prescaler = 0;
- unsigned long now;
+ unsigned int prescaler = 0;
bool bypass;
pwm_get_state(pwm, &cstate);
@@ -291,8 +288,6 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
val = (duty & PWM_DTY_MASK) | PWM_PRD(period);
sun4i_pwm_writel(sun4i_pwm, val, PWM_CH_PRD(pwm->hwpwm));
- sun4i_pwm->next_period[pwm->hwpwm] = jiffies +
- nsecs_to_jiffies(cstate.period + 1000);
if (state->polarity != PWM_POLARITY_NORMAL)
ctrl &= ~BIT_CH(PWM_ACT_STATE, pwm->hwpwm);
@@ -314,15 +309,7 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
}
/* We need a full period to elapse before disabling the channel. */
- now = jiffies;
- if (time_before(now, sun4i_pwm->next_period[pwm->hwpwm])) {
- delay_us = jiffies_to_usecs(sun4i_pwm->next_period[pwm->hwpwm] -
- now);
- if ((delay_us / 500) > MAX_UDELAY_MS)
- msleep(delay_us / 1000 + 1);
- else
- usleep_range(delay_us, delay_us * 2);
- }
+ fsleep(cstate.period / NSEC_PER_USEC + 1);
ctrl &= ~BIT_CH(PWM_CLK_GATING, pwm->hwpwm);
sun4i_pwm_writel(sun4i_pwm, ctrl, PWM_CTRL_REG);
--
2.31.1
next prev parent reply other threads:[~2021-05-31 4:46 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-31 4:46 [PATCH 0/6] pwm: sun4i: only wait 2 cycles prior to disabling Roman Beranek
2021-05-31 4:46 ` [PATCH 1/6] pwm: sun4i: enable clk prior to getting its rate Roman Beranek
2021-06-07 8:00 ` Uwe Kleine-König
2021-05-31 4:46 ` [PATCH 2/6] pwm: sun4i: disable EN bit prior to the delay Roman Beranek
2021-06-07 8:07 ` Uwe Kleine-König
2021-05-31 4:46 ` [PATCH 3/6] pwm: sun4i: replace spinlock with a mutex Roman Beranek
2021-05-31 4:46 ` Roman Beranek [this message]
2021-05-31 4:46 ` [PATCH 5/6] pwm: sun4i: shorten the delay to 2 cycles Roman Beranek
2021-05-31 4:46 ` [PATCH 6/6] pwm: sun4i: don't delay if the PWM is already off Roman Beranek
2021-06-10 13:41 ` Pascal Roeleven
2021-05-31 19:07 ` [PATCH 0/6] pwm: sun4i: only wait 2 cycles prior to disabling Pascal Roeleven
2021-05-31 20:01 ` Emil Lenngren
2021-05-31 20:20 ` Pascal Roeleven
2021-06-08 12:28 ` Pascal Roeleven
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