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From: Guo Ren <guoren@kernel.org>
To: Maxime Ripard <maxime@cerno.tech>
Cc: "Jernej Škrabec" <jernej.skrabec@gmail.com>,
	"Anup Patel" <anup.patel@wdc.com>,
	"Palmer Dabbelt" <palmerdabbelt@google.com>,
	"Arnd Bergmann" <arnd@arndb.de>, "Chen-Yu Tsai" <wens@csie.org>,
	"Drew Fustini" <drew@beagleboard.org>,
	liush@allwinnertech.com, "Wei Wu (吴伟)" <lazyparser@gmail.com>,
	wefu@redhat.com, linux-riscv <linux-riscv@lists.infradead.org>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	linux-arch <linux-arch@vger.kernel.org>,
	linux-sunxi@lists.linux.dev, "Guo Ren" <guoren@linux.alibaba.com>,
	"Atish Patra" <atish.patra@wdc.com>,
	"Christoph Hellwig" <hch@lst.de>
Subject: Re: [RFC PATCH v2 09/11] riscv: soc: Initial DTS for Allwinner D1 NeZha board
Date: Mon, 7 Jun 2021 15:53:23 +0800	[thread overview]
Message-ID: <CAJF2gTS9+JYBg2dPEwQccNGku4_z_tv0qwgWQiFN8dQcQ=WweQ@mail.gmail.com> (raw)
In-Reply-To: <20210607072709.ul4jdvtyspj6t4c6@gilmour>

Thx for the clarification.

On Mon, Jun 7, 2021 at 3:27 PM Maxime Ripard <maxime@cerno.tech> wrote:
>
> On Mon, Jun 07, 2021 at 11:44:03AM +0800, Guo Ren wrote:
> > On Mon, Jun 7, 2021 at 12:26 AM Jernej Škrabec <jernej.skrabec@gmail.com> wrote:
> > >
> > > Hi!
> > >
> > > I didn't go through all details. After you fix all comments below, you should
> > > run "make dtbs_check" and fix all reported warnings too.
> > >
> > > Dne nedelja, 06. junij 2021 ob 11:04:07 CEST je guoren@kernel.org napisal(a):
> > > > From: Guo Ren <guoren@linux.alibaba.com>
> > > >
> > > > Add initial DTS for Allwinner D1 NeZha board having only essential
> > > > devices (uart, dummy, clock, reset, clint, plic, etc).
> > > >
> > > > Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> > > > Co-Developed-by: Liu Shaohua <liush@allwinnertech.com>
> > > > Signed-off-by: Liu Shaohua <liush@allwinnertech.com>
> > > > Cc: Anup Patel <anup.patel@wdc.com>
> > > > Cc: Atish Patra <atish.patra@wdc.com>
> > > > Cc: Christoph Hellwig <hch@lst.de>
> > > > Cc: Chen-Yu Tsai <wens@csie.org>
> > > > Cc: Drew Fustini <drew@beagleboard.org>
> > > > Cc: Maxime Ripard <maxime@cerno.tech>
> > > > Cc: Palmer Dabbelt <palmerdabbelt@google.com>
> > > > Cc: Wei Fu <wefu@redhat.com>
> > > > Cc: Wei Wu <lazyparser@gmail.com>
> > > > ---
> > > >  arch/riscv/boot/dts/Makefile                       |  1 +
> > > >  arch/riscv/boot/dts/allwinner/Makefile             |  2 +
> > > >  .../boot/dts/allwinner/allwinner-d1-nezha-kit.dts  | 29 ++++++++
> > > >  arch/riscv/boot/dts/allwinner/allwinner-d1.dtsi    | 84
> > > > ++++++++++++++++++++++ 4 files changed, 116 insertions(+)
> > > >  create mode 100644 arch/riscv/boot/dts/allwinner/Makefile
> > > >  create mode 100644 arch/riscv/boot/dts/allwinner/allwinner-d1-nezha-kit.dts
> > > > create mode 100644 arch/riscv/boot/dts/allwinner/allwinner-d1.dtsi
> > > >
> > > > diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile
> > > > index fe996b8..3e7b264 100644
> > > > --- a/arch/riscv/boot/dts/Makefile
> > > > +++ b/arch/riscv/boot/dts/Makefile
> > > > @@ -2,5 +2,6 @@
> > > >  subdir-y += sifive
> > > >  subdir-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += canaan
> > > >  subdir-y += microchip
> > > > +subdir-y += allwinner
> > > >
> > > >  obj-$(CONFIG_BUILTIN_DTB) := $(addsuffix /, $(subdir-y))
> > > > diff --git a/arch/riscv/boot/dts/allwinner/Makefile
> > > > b/arch/riscv/boot/dts/allwinner/Makefile new file mode 100644
> > > > index 00000000..4adbf4b
> > > > --- /dev/null
> > > > +++ b/arch/riscv/boot/dts/allwinner/Makefile
> > > > @@ -0,0 +1,2 @@
> > > > +# SPDX-License-Identifier: GPL-2.0
> > > > +dtb-$(CONFIG_SOC_SUNXI) += allwinner-d1-nezha-kit.dtb
> > > > diff --git a/arch/riscv/boot/dts/allwinner/allwinner-d1-nezha-kit.dts
> > > > b/arch/riscv/boot/dts/allwinner/allwinner-d1-nezha-kit.dts new file mode
> > > > 100644
> > > > index 00000000..cd9f7c9
> > > > --- /dev/null
> > > > +++ b/arch/riscv/boot/dts/allwinner/allwinner-d1-nezha-kit.dts
> > >
> > > Board DT names are comprised of soc name and board name, in this case it would
> > > be "sun20i-d1-nezha-kit.dts"
> > >
> > > > @@ -0,0 +1,29 @@
> > > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > >
> > > Usually copyrights are added below spdx id.
> > >
> > > > +
> > > > +/dts-v1/;
> > > > +
> > > > +#include "allwinner-d1.dtsi"
> > > > +
> > > > +/ {
> > > > +     #address-cells = <2>;
> > > > +     #size-cells = <2>;
> > >
> > > This should be part of SoC level DTSI.
> > >
> > > > +     model = "Allwinner D1 NeZha Kit";
> > > > +     compatible = "allwinner,d1-nezha-kit";
> > >
> > > Board specific compatible string should be followed with SoC compatible, in
> > > this case "allwinner,sun20i-d1".  You should document it too.
> > >
> > > > +
> > > > +     chosen {
> > > > +             bootargs = "console=ttyS0,115200";
> > >
> > > Above line doesn't belong here. If anything, it should be added dynamically by
> > > bootloader.
> >
> > After discussion, we still want to keep a default value here.
> > Sometimes we could boot with jtag and parse dtb is hard for gdbinit
> > script.
> >
> > >
> > > > +             stdout-path = &serial0;
> > > > +     };
> > > > +
> > > > +     memory@40000000 {
> > > > +             device_type = "memory";
> > > > +             reg = <0x0 0x40000000 0x0 0x20000000>;
> > > > +     };
> > >
> > > Ditto for whole memory node.
> >
> > Ditto
>
> The thing is that there's never a good value for a default. Let's take
> the memory node here: what would be a good default? If we want to make
> it work everywhere it's going to be the lowest amount of memory
> available on the D1 boards. It's going to be hard to maintain and very
> likely to be overlooked, resulting in broken boards anyway.
>
> If someone is savvy enough to use JTAG, it's not really difficult to
> modify the DT for their board when they need it.
okay, I see. I'll follow the rule in the next version of the patchset.

>
> Maxime



-- 
Best Regards
 Guo Ren

ML: https://lore.kernel.org/linux-csky/

  reply	other threads:[~2021-06-07  7:53 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-06  9:03 [RFC PATCH v2 00/11] riscv: Add DMA_COHERENT support for Allwinner D1 guoren
2021-06-06  9:03 ` [RFC PATCH v2 01/11] riscv: asid: Use global mappings for kernel pages guoren
2021-06-06  9:03 ` [PATCH V5 1/3] riscv: " guoren
2021-06-06  9:03 ` [PATCH V5 2/3] riscv: Add ASID-based tlbflushing methods guoren
2021-06-06 14:38   ` Christoph Hellwig
2021-06-06  9:03 ` [RFC PATCH v2 02/11] riscv: asid: " guoren
2021-06-06  9:04 ` [RFC PATCH v2 03/11] riscv: asid: Optimize tlbflush coding convention guoren
2021-06-06  9:04 ` [PATCH V5 3/3] riscv: tlbflush: Optimize " guoren
2021-06-06  9:04 ` [RFC PATCH v2 04/11] riscv: pgtable: Fixup _PAGE_CHG_MASK usage guoren
2021-06-06  9:04 ` [RFC PATCH v2 05/11] riscv: pgtable: Add custom protection_map init guoren
2021-06-06  9:04 ` [RFC PATCH v2 06/11] riscv: pgtable: Add DMA_COHERENT with custom PTE attributes guoren
2021-06-06 14:39   ` Christoph Hellwig
2021-06-06 15:08     ` Guo Ren
2021-06-06 17:22   ` Nick Kossifidis
2021-06-07  6:19     ` Christoph Hellwig
2021-06-06  9:04 ` [RFC PATCH v2 07/11] riscv: cmo: Add dma-noncoherency support guoren
2021-10-17  9:28   ` twd2
2021-10-20  8:11     ` Guo Ren
2021-06-06  9:04 ` [RFC PATCH v2 08/11] riscv: cmo: Add vendor custom icache sync guoren
2021-06-06  9:04 ` [RFC PATCH v2 09/11] riscv: soc: Initial DTS for Allwinner D1 NeZha board guoren
2021-06-06 16:26   ` Jernej Škrabec
2021-06-06 17:05     ` Guo Ren
2021-06-07  3:44     ` Guo Ren
2021-06-07  7:27       ` Maxime Ripard
2021-06-07  7:53         ` Guo Ren [this message]
2021-06-07  7:24   ` Maxime Ripard
2021-06-07  8:07     ` Guo Ren
2021-06-14 15:33       ` Maxime Ripard
2021-06-14 16:28         ` Guo Ren
2021-06-14 16:31           ` Jernej Škrabec
2021-06-06  9:04 ` [RFC PATCH v2 10/11] riscv: soc: Add Allwinner SoC kconfig option guoren
2021-06-07  7:19   ` Maxime Ripard
2021-06-07  7:27     ` Arnd Bergmann
2021-06-07  7:45       ` Guo Ren
2021-06-07  7:43     ` Guo Ren
2021-06-07 12:12       ` Maxime Ripard
2021-06-07 12:39         ` Guo Ren
2021-06-06  9:04 ` [RFC PATCH v2 11/11] riscv: soc: Allwinner D1 GMAC driver only for temp use guoren
2021-06-06 10:50   ` Andre Przywara
2021-06-06 15:32     ` Guo Ren
2021-06-06 15:39       ` Jernej Škrabec
2021-06-06 15:41         ` Guo Ren
2021-06-06 16:16   ` Arnd Bergmann
2021-06-06 16:32     ` Jernej Škrabec
2021-06-06 16:53       ` Guo Ren
2021-06-06 16:53     ` Guo Ren
2021-06-06 16:29 ` [RFC PATCH v2 00/11] riscv: Add DMA_COHERENT support for Allwinner D1 Jernej Škrabec
2021-06-06 16:54   ` Guo Ren
2021-06-06 17:14     ` Jernej Škrabec
2021-06-06 23:42       ` Guo Ren
2021-06-07  3:44 ` Anup Patel
2021-06-07  4:36   ` Guo Ren

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