From: Vinod Koul <vkoul@kernel.org>
To: Andre Przywara <andre.przywara@arm.com>
Cc: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Rob Herring <robh@kernel.org>, Icenowy Zheng <icenowy@aosc.io>,
Samuel Holland <samuel@sholland.org>,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@googlegroups.com, linux-sunxi@lists.linux.dev,
linux-kernel@vger.kernel.org, Ondrej Jirman <megous@megous.com>,
Kishon Vijay Abraham I <kishon@ti.com>,
linux-phy@lists.infradead.org, linux-usb@vger.kernel.org
Subject: Re: [PATCH v7 14/19] phy: sun4i-usb: Introduce port2 SIDDQ quirk
Date: Mon, 21 Jun 2021 10:06:31 +0530 [thread overview]
Message-ID: <YNAXT5lYVcJ309zJ@vkoul-mobl> (raw)
In-Reply-To: <20210615110636.23403-15-andre.przywara@arm.com>
On 15-06-21, 12:06, Andre Przywara wrote:
> At least the Allwinner H616 SoC requires a weird quirk to make most
> USB PHYs work: Only port2 works out of the box, but all other ports
> need some help from this port2 to work correctly: The CLK_BUS_PHY2 and
> RST_USB_PHY2 clock and reset need to be enabled, and the SIDDQ bit in
> the PMU PHY control register needs to be cleared. For this register to
> be accessible, CLK_BUS_ECHI2 needs to be ungated. Don't ask ....
>
> Instead of disguising this as some generic feature, do exactly that
> in our PHY init:
> If the quirk bit is set, and we initialise a PHY other than PHY2, ungate
> this one special clock, and clear the SIDDQ bit. We can pull in the
> other required clocks via the DT.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> drivers/phy/allwinner/phy-sun4i-usb.c | 59 +++++++++++++++++++++++++++
> 1 file changed, 59 insertions(+)
>
> diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c
> index 126ef74d013c..316ef5fca831 100644
> --- a/drivers/phy/allwinner/phy-sun4i-usb.c
> +++ b/drivers/phy/allwinner/phy-sun4i-usb.c
> @@ -120,6 +120,7 @@ struct sun4i_usb_phy_cfg {
> u8 phyctl_offset;
> bool dedicated_clocks;
> bool phy0_dual_route;
> + bool needs_phy2_siddq;
> int missing_phys;
> };
>
> @@ -289,6 +290,50 @@ static int sun4i_usb_phy_init(struct phy *_phy)
> return ret;
> }
>
> + /* Some PHYs on some SoCs need the help of PHY2 to work. */
> + if (data->cfg->needs_phy2_siddq && phy->index != 2) {
> + struct sun4i_usb_phy *phy2 = &data->phys[2];
> +
> + ret = clk_prepare_enable(phy2->clk);
> + if (ret) {
> + reset_control_assert(phy->reset);
> + clk_disable_unprepare(phy->clk2);
> + clk_disable_unprepare(phy->clk);
> + return ret;
> + }
> +
> + ret = reset_control_deassert(phy2->reset);
> + if (ret) {
> + clk_disable_unprepare(phy2->clk);
> + reset_control_assert(phy->reset);
> + clk_disable_unprepare(phy->clk2);
> + clk_disable_unprepare(phy->clk);
> + return ret;
> + }
no delay between deassert and assert... ?
--
~Vinod
next prev parent reply other threads:[~2021-06-21 4:36 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-15 11:06 [PATCH v7 00/19] arm64: sunxi: Initial Allwinner H616 SoC support Andre Przywara
2021-06-15 11:06 ` [PATCH v7 01/19] dt-bindings: mfd: axp20x: Add AXP305 compatible (plus optional IRQ) Andre Przywara
2021-06-15 23:33 ` Rob Herring
2021-06-16 14:57 ` Andre Przywara
2021-06-15 11:06 ` [PATCH v7 02/19] mfd: axp20x: Allow AXP 806 chips without interrupt lines Andre Przywara
2021-06-15 11:06 ` [PATCH v7 03/19] dt-bindings: rtc: sun6i: Add H616 compatible string Andre Przywara
2021-06-15 23:35 ` Rob Herring
2021-06-16 14:59 ` Andre Przywara
2021-06-15 11:06 ` [PATCH v7 04/19] rtc: sun6i: Add support for linear day storage Andre Przywara
2021-06-17 18:16 ` kernel test robot
2021-06-17 20:07 ` kernel test robot
2021-06-18 15:43 ` Andre Przywara
2021-06-15 11:06 ` [PATCH v7 05/19] rtc: sun6i: Add support for broken-down alarm registers Andre Przywara
2021-06-17 23:17 ` kernel test robot
2021-06-15 11:06 ` [PATCH v7 06/19] rtc: sun6i: Add support for RTCs without external LOSCs Andre Przywara
2021-06-16 9:14 ` Maxime Ripard
2021-06-16 10:14 ` Andre Przywara
2021-06-16 13:47 ` Maxime Ripard
2021-07-22 23:17 ` Andre Przywara
2021-07-26 14:59 ` Maxime Ripard
2021-07-29 8:04 ` Icenowy Zheng
2021-07-29 10:32 ` Maxime Ripard
2021-07-29 13:04 ` Icenowy Zheng
2021-06-15 11:06 ` [PATCH v7 07/19] rtc: sun6i: Add Allwinner H616 support Andre Przywara
2021-06-15 11:06 ` [PATCH v7 08/19] dt-bindings: net: sun8i-emac: Add H616 compatible string Andre Przywara
2021-06-15 11:06 ` [PATCH v7 09/19] net: stmmac: dwmac-sun8i: Prepare for second EMAC clock register Andre Przywara
2021-06-15 11:06 ` [PATCH v7 10/19] dt-bindings: usb: Add H616 compatible string Andre Przywara
2021-06-15 11:06 ` [PATCH v7 11/19] dt-bindings: usb: sunxi-musb: " Andre Przywara
2021-06-15 11:06 ` [PATCH v7 12/19] phy: sun4i-usb: Rework HCI PHY (aka. "pmu_unk1") handling Andre Przywara
2021-06-15 11:06 ` [PATCH v7 13/19] phy: sun4i-usb: Allow reset line to be shared Andre Przywara
2021-06-15 11:25 ` Philipp Zabel
2021-06-15 11:06 ` [PATCH v7 14/19] phy: sun4i-usb: Introduce port2 SIDDQ quirk Andre Przywara
2021-06-21 4:36 ` Vinod Koul [this message]
2021-06-21 9:14 ` Andre Przywara
2021-06-15 11:06 ` [PATCH v7 15/19] phy: sun4i-usb: Add support for the H616 USB PHY Andre Przywara
2021-07-12 16:50 ` Evgeny Boger
2021-06-15 11:06 ` [PATCH v7 16/19] arm64: dts: allwinner: Add Allwinner H616 .dtsi file Andre Przywara
2021-06-16 9:23 ` Maxime Ripard
2021-06-16 10:06 ` Andre Przywara
2021-06-17 15:42 ` Maxime Ripard
2021-06-17 15:47 ` Jernej Škrabec
2021-06-15 11:06 ` [PATCH v7 17/19] dt-bindings: arm: sunxi: Add two H616 board compatible strings Andre Przywara
2021-06-16 17:38 ` Rob Herring
2021-06-15 11:06 ` [PATCH v7 18/19] arm64: dts: allwinner: h616: Add OrangePi Zero 2 board support Andre Przywara
2021-06-15 11:06 ` [PATCH v7 19/19] arm64: dts: allwinner: h616: Add X96 Mate TV box support Andre Przywara
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