From: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
To: krzysztof.kozlowski@linaro.org, thierry.reding@gmail.com,
jonathanh@nvidia.com, linux-tegra@vger.kernel.org
Cc: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Subject: [PATCH v2 2/7] memory: tegra: Move DQSOSC measurement to common place
Date: Fri, 19 Apr 2024 11:45:10 +0100 [thread overview]
Message-ID: <20240419104516.308975-3-diogo.ivo@tecnico.ulisboa.pt> (raw)
In-Reply-To: <20240419104516.308975-1-diogo.ivo@tecnico.ulisboa.pt>
Move the calls that instruct the RAM to capture its clock tree delays
to update_clock_tree_delay() in order to avoid code duplication.
Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
---
drivers/memory/tegra/tegra210-emc-cc-r21021.c | 25 ++++++++-----------
1 file changed, 11 insertions(+), 14 deletions(-)
diff --git a/drivers/memory/tegra/tegra210-emc-cc-r21021.c b/drivers/memory/tegra/tegra210-emc-cc-r21021.c
index 9ec49ced8f91..15048f542367 100644
--- a/drivers/memory/tegra/tegra210-emc-cc-r21021.c
+++ b/drivers/memory/tegra/tegra210-emc-cc-r21021.c
@@ -123,10 +123,19 @@ static u32 update_clock_tree_delay(struct tegra210_emc *emc, int type)
bool dvfs_update = type == DVFS_UPDATE;
s32 tdel = 0, tmdel = 0, adel = 0;
bool dvfs_pt1 = type == DVFS_PT1;
+ u32 temp[2][2], value, udelay;
unsigned long cval = 0;
- u32 temp[2][2], value;
unsigned int i;
+ if (dvfs_pt1 || periodic_training_update) {
+ udelay = tegra210_emc_actual_osc_clocks(last->run_clocks);
+ udelay *= 1000;
+ udelay = 2 + (udelay / last->rate);
+
+ tegra210_emc_start_periodic_compensation(emc);
+ udelay(udelay);
+ }
+
/*
* Dev0 MSB.
*/
@@ -409,11 +418,6 @@ static u32 periodic_compensation_handler(struct tegra210_emc *emc, u32 type,
(nt)->ptfv_list[PTFV_DVFS_SAMPLES_INDEX]; })
u32 i, adel = 0, samples = next->ptfv_list[PTFV_DVFS_SAMPLES_INDEX];
- u32 delay;
-
- delay = tegra210_emc_actual_osc_clocks(last->run_clocks);
- delay *= 1000;
- delay = 2 + (delay / last->rate);
if (!next->periodic_training)
return 0;
@@ -447,9 +451,6 @@ static u32 periodic_compensation_handler(struct tegra210_emc *emc, u32 type,
__MOVAVG(next, C1D1U1) = 0;
for (i = 0; i < samples; i++) {
- tegra210_emc_start_periodic_compensation(emc);
- udelay(delay);
-
/*
* Generate next sample of data.
*/
@@ -465,12 +466,8 @@ static u32 periodic_compensation_handler(struct tegra210_emc *emc, u32 type,
adel = update_clock_tree_delay(emc, DVFS_UPDATE);
}
- if (type == PERIODIC_TRAINING_SEQUENCE) {
- tegra210_emc_start_periodic_compensation(emc);
- udelay(delay);
-
+ if (type == PERIODIC_TRAINING_SEQUENCE)
adel = update_clock_tree_delay(emc, PERIODIC_TRAINING_UPDATE);
- }
return adel;
}
--
2.44.0
next prev parent reply other threads:[~2024-04-19 10:45 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-19 10:45 [PATCH v2 0/7] Cleanup Tegra210 EMC frequency scaling Diogo Ivo
2024-04-19 10:45 ` [PATCH v2 1/7] memory: tegra: Remove periodic compensation duplicate calls Diogo Ivo
2024-04-19 10:45 ` Diogo Ivo [this message]
2024-04-19 10:45 ` [PATCH v2 3/7] memory: tegra: Reword and correct comments Diogo Ivo
2024-04-19 10:45 ` [PATCH v2 4/7] memory: tegra: Change macros to interpret parameter as integer Diogo Ivo
2024-04-19 10:45 ` [PATCH v2 5/7] memory: tegra: Loop update_clock_tree_delay() Diogo Ivo
2024-04-19 10:45 ` [PATCH v2 6/7] memory: tegra: Move compare/update current delay values to a function Diogo Ivo
2024-04-19 10:45 ` [PATCH v2 7/7] memory: tegra: Rework update_clock_tree_delay() Diogo Ivo
2024-04-24 18:16 ` [PATCH v2 0/7] Cleanup Tegra210 EMC frequency scaling Krzysztof Kozlowski
2024-04-25 6:11 ` Krzysztof Kozlowski
2024-04-27 17:05 ` Diogo Ivo
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