On Fri, 3 Mar 2023 at 16:37, Roberto Sassu
<roberto.sassu@huaweicloud.com> wrote:
>
> Hi
>
> it looks like one recent commit causes the kernel build to break.
>
>   GEN     scripts/gdb/linux/constants.py
> In file included from /usr/include/stdlib.h:1013,
>                  from arch/um/os-Linux/helper.c:6:
> /usr/include/x86_64-linux-gnu/bits/stdlib-float.h: In function ‘atof’:
> /usr/include/x86_64-linux-gnu/bits/stdlib-float.h:26:1: error: SSE register return with SSE disabled
>    26 | {
>       | ^
>   CC      init/noinitramfs.o
>
> It works again by reverting commit 884981867947 ("rust: arch/um:
> Disable FP/SIMD instruction to match x86").
>
> $ cat /proc/cpuinfo
>
> [...]
>
> processor       : 31
> vendor_id       : AuthenticAMD
> cpu family      : 23
> model           : 49
> model name      : AMD Ryzen Threadripper PRO 3955WX 16-Cores
>
> Thanks
>
> Roberto
>

Yup, this is definitely caused by 884981867947 ("rust: arch/um:
Disable FP/SIMD instruction to match x86").

It looks like GCC fixed this upstream in GCC 11:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99652

Equally though, not having this change breaks older versions of LLVM,
so I think it's best to not totally revert it.

Something like this should work:
---
diff --git a/arch/x86/Makefile.um b/arch/x86/Makefile.um
index d2e95d1d4db7..1aa64846e539 100644
--- a/arch/x86/Makefile.um
+++ b/arch/x86/Makefile.um
@@ -3,9 +3,14 @@ core-y += arch/x86/crypto/

#
# Disable SSE and other FP/SIMD instructions to match normal x86
+# This is required to work around issues in older LLVM versions, but breaks
+# GCC versions < 11. See:
+# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99652
#
+ifeq ($(CONFIG_CC_IS_CLANG),y)
KBUILD_CFLAGS += -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -mno-avx
KBUILD_RUSTFLAGS +=
-Ctarget-feature=-sse,-sse2,-sse3,-ssse3,-sse4.1,-sse4.2,-avx,-avx2
+endif

ifeq ($(CONFIG_X86_32),y)
START := 0x8048000
---

Though the more correct solution would be to just check
gcc-min-version || clang. That probably requires a bit more
makefile-fu to do cleanly, though.

Cheers,
-- David