linux-usb.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Chunfeng Yun <chunfeng.yun@mediatek.com>
To: Nagarjuna Kristam <nkristam@nvidia.com>
Cc: <balbi@kernel.org>, <gregkh@linuxfoundation.org>,
	<thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
	<mark.rutland@arm.com>, <robh+dt@kernel.org>, <kishon@ti.com>,
	<devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
	<linux-usb@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH V3 6/8] phy: tegra: xusb: Add support for charger detect
Date: Thu, 14 May 2020 15:02:22 +0800	[thread overview]
Message-ID: <1589439742.5899.2.camel@mhfsdcap03> (raw)
In-Reply-To: <1589437363-16727-7-git-send-email-nkristam@nvidia.com>

On Thu, 2020-05-14 at 11:52 +0530, Nagarjuna Kristam wrote:
> Perform charger-detect operation if corresponding dt property is enabled.
> Update usb-phy with the detected charger state and max current values.
> Register charger-detect API's of usb-phy to provide needed functionalities.
> 
> Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
> ---
> V3:
>  - Allighed functions and its arguments.
>  - replaced spaced by tabs for MACRO definition allignments.
>  - Unified primary and secondary charger detect API's.
>  - Used readl_poll_timeout instead of while loop condition check for register.
>  - Fixed other comments as per inputs from Thierry.
> ---
> V2:
>  - Patch re-based.
> ---
>  drivers/phy/tegra/Makefile |   2 +-
>  drivers/phy/tegra/cd.c     | 283 +++++++++++++++++++++++++++++++++++++++++++++
>  drivers/phy/tegra/xusb.c   |  80 +++++++++++++
>  drivers/phy/tegra/xusb.h   |   7 ++
>  4 files changed, 371 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/phy/tegra/cd.c
> 
> diff --git a/drivers/phy/tegra/Makefile b/drivers/phy/tegra/Makefile
> index 89b8406..befdfc4 100644
> --- a/drivers/phy/tegra/Makefile
> +++ b/drivers/phy/tegra/Makefile
> @@ -1,7 +1,7 @@
>  # SPDX-License-Identifier: GPL-2.0-only
>  obj-$(CONFIG_PHY_TEGRA_XUSB) += phy-tegra-xusb.o
>  
> -phy-tegra-xusb-y += xusb.o
> +phy-tegra-xusb-y += xusb.o cd.o
>  phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_124_SOC) += xusb-tegra124.o
>  phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_132_SOC) += xusb-tegra124.o
>  phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_210_SOC) += xusb-tegra210.o
> diff --git a/drivers/phy/tegra/cd.c b/drivers/phy/tegra/cd.c
> new file mode 100644
> index 0000000..fddbe4c
> --- /dev/null
> +++ b/drivers/phy/tegra/cd.c
> @@ -0,0 +1,283 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (c) 2020, NVIDIA CORPORATION.  All rights reserved.
> + */
> +
> +#include <linux/delay.h>
> +#include <linux/iopoll.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/phy/phy.h>
> +
> +#include "xusb.h"
> +
> +/* Data contact detection timeout */
> +#define TDCD_TIMEOUT_MS				400
> +
> +#define USB2_BATTERY_CHRG_OTGPADX_CTL0(x)	(0x80 + (x) * 0x40)
> +#define  PD_CHG					(1 << 0)
> +#define  VDCD_DET_FILTER_EN			(1 << 4)
> +#define  VDAT_DET				(1 << 5)
> +#define  VDAT_DET_FILTER_EN			(1 << 8)
> +#define  OP_SINK_EN				(1 << 9)
> +#define  OP_SRC_EN				(1 << 10)
> +#define  ON_SINK_EN				(1 << 11)
> +#define  ON_SRC_EN				(1 << 12)
> +#define  OP_I_SRC_EN				(1 << 13)
> +#define  ZIP_FILTER_EN				(1 << 21)
> +#define  ZIN_FILTER_EN				(1 << 25)
> +#define  DCD_DETECTED				(1 << 26)
Use BIT() ?
> +
> +#define USB2_BATTERY_CHRG_OTGPADX_CTL1(x)	(0x84 + (x) * 0x40)
> +#define  PD_VREG				(1 << 6)
> +#define  VREG_LEV(x)				(((x) & 0x3) << 7)
> +#define  VREG_DIR(x)				(((x) & 0x3) << 11)
> +#define  VREG_DIR_IN				VREG_DIR(1)
> +#define  VREG_DIR_OUT				VREG_DIR(2)
> +#define  USBOP_RPD_OVRD				(1 << 16)
> +#define  USBOP_RPD_OVRD_VAL			(1 << 17)
> +#define  USBOP_RPU_OVRD				(1 << 18)
> +#define  USBOP_RPU_OVRD_VAL			(1 << 19)
> +#define  USBON_RPD_OVRD				(1 << 20)
> +#define  USBON_RPD_OVRD_VAL			(1 << 21)
> +#define  USBON_RPU_OVRD				(1 << 22)
> +#define  USBON_RPU_OVRD_VAL			(1 << 23)
> +
> +#define XUSB_PADCTL_USB2_OTG_PADX_CTL0(x)	(0x88 + (x) * 0x40)
> +#define  USB2_OTG_PD2				(1 << 27)
> +#define  USB2_OTG_PD2_OVRD_EN			(1 << 28)
> +#define  USB2_OTG_PD_ZI				(1 << 29)
> +
> +#define XUSB_PADCTL_USB2_BATTERY_CHRG_TDCD_DBNC_TIMER_0 (0x280)
> +#define   TDCD_DBNC(x)				(((x) & 0x7ff) << 0)
> +
> +static void
> +tegra_xusb_padctl_set_debounce_time(struct tegra_xusb_padctl *padctl,
> +				    u32 debounce)


  reply	other threads:[~2020-05-14  7:04 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-14  6:22 [PATCH V3 0/8] Tegra XUSB charger detect support Nagarjuna Kristam
2020-05-14  6:22 ` [PATCH V3 1/8] dt-bindings: phy: tegra-xusb: Add charger-detect property Nagarjuna Kristam
2020-05-14  6:22 ` [PATCH V3 2/8] usb: gadget: tegra-xudc: Add vbus_draw support Nagarjuna Kristam
2020-06-04 13:54   ` Thierry Reding
2020-05-14  6:22 ` [PATCH V3 3/8] phy: tegra: xusb: Add support for UTMI pad power control Nagarjuna Kristam
2020-05-14  6:22 ` [PATCH V3 4/8] phy: tegra: xusb: Add USB2 pad power control support for Tegra210 Nagarjuna Kristam
2020-05-14  6:22 ` [PATCH V3 5/8] phy: tegra: xusb: Add soc ops API to enable UTMI PAD protection Nagarjuna Kristam
2020-05-18 12:24   ` Kishon Vijay Abraham I
2020-06-04 13:58     ` Thierry Reding
2020-06-04 13:55   ` Thierry Reding
2020-05-14  6:22 ` [PATCH V3 6/8] phy: tegra: xusb: Add support for charger detect Nagarjuna Kristam
2020-05-14  7:02   ` Chunfeng Yun [this message]
2020-06-04 13:56   ` Thierry Reding
2020-05-14  6:22 ` [PATCH V3 7/8] phy: tegra: xusb: Enable charger detect for Tegra186 Nagarjuna Kristam
2020-05-14  6:22 ` [PATCH V3 8/8] phy: tegra: xusb: Enable charger detect for Tegra210 Nagarjuna Kristam
2020-05-14  9:39 ` [PATCH V3 0/8] Tegra XUSB charger detect support Felipe Balbi
2020-05-14  9:46   ` Nagarjuna Kristam

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1589439742.5899.2.camel@mhfsdcap03 \
    --to=chunfeng.yun@mediatek.com \
    --cc=balbi@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=gregkh@linuxfoundation.org \
    --cc=jonathanh@nvidia.com \
    --cc=kishon@ti.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=linux-usb@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=nkristam@nvidia.com \
    --cc=robh+dt@kernel.org \
    --cc=thierry.reding@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).