Re: [PATCH 2/2] usb: cdns3: gadget: toggle cycle bit before reset endpoint

[Peter Chen <peter.chen@nxp.com>]

On 20-02-14 10:48:47, Roger Quadros wrote:
> 
> 
> On 14/02/2020 09:14, Peter Chen wrote:
> > If there are TRBs pending during clear stall and reset endpoint, the
> 
> s/and/or?

I think it is reset operation, just I observe it at these two operations
together.

> 
> > DMA will advance after reset operation, but it doesn't be expected,
> 
> s/doesn't/isn't?
> 
> > since the data has still not be ready (For OUT, the data has still
> 
> s/"has still not be"/"is not yet"
> 
> (e.g. for OUT, the data is not yet available).
> 
> > not received). After the data is ready, there isn't any interrupt
> 
> s/"there isn't any"/"there won't be any"
> 
> > since the EP_TRADDR has already points to next TRB entry.
> 
> remove "has"
> 
> > 
> > To fix it, it toggles cyclt bit before reset operation, and restore
> 
> s/cyclt/cycle
> 
> s/restore/restores
> 

Will change above typo.

> > it after reset, it could keep DMA stopping.
> 
> It prevents DMA from getting stuck up?

It could avoid unexpected DMA advance later due to TRB content has
changed during the reset.

> 
> > 
> > Fixes: 7733f6c32e36 ("usb: cdns3: Add Cadence USB3 DRD Driver")
> > Signed-off-by: Peter Chen <peter.chen@nxp.com>
> > ---
> >   drivers/usb/cdns3/gadget.c | 17 ++++++++++++++---
> >   1 file changed, 14 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c
> > index 1d8a2af35bb0..7b6bb96b91d1 100644
> > --- a/drivers/usb/cdns3/gadget.c
> > +++ b/drivers/usb/cdns3/gadget.c
> > @@ -2595,11 +2595,21 @@ int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep)
> >   {
> >   	struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
> >   	struct usb_request *request;
> > +	struct cdns3_request *priv_req;
> > +	struct cdns3_trb *trb = NULL;
> >   	int ret;
> >   	int val;
> >   	trace_cdns3_halt(priv_ep, 0, 0);
> > +	request = cdns3_next_request(&priv_ep->pending_req_list);
> > +	if (request) {
> > +		priv_req = to_cdns3_request(request);
> > +		trb = priv_req->trb;
> > +		if (trb)
> > +			trb->control = trb->control ^ 1;
> 
> use TRB_CYCLE macro instead of 1.
> 
> Is it better to toggle this bit or explicitly set/clear it?

Since we don't know the value for cycle bit, it is better just
toggle it.

> 
> > +	}
> > +
> >   	writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
> >   	/* wait for EPRST cleared */
> > @@ -2610,10 +2620,11 @@ int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep)
> >   	priv_ep->flags &= ~(EP_STALLED | EP_STALL_PENDING);
> > -	request = cdns3_next_request(&priv_ep->pending_req_list);
> > -
> > -	if (request)
> > +	if (request) {
> > +		if (trb)
> > +			trb->control = trb->control ^ 1;
> 
> same here.

Ok.

-- 

Thanks,
Peter Chen