From: Peter Geis <pgwipeout@gmail.com>
To: Chunfeng Yun <chunfeng.yun@mediatek.com>
Cc: katsuhiro@katsuster.net, linux-rockchip@lists.infradead.org,
linux-usb@vger.kernel.org, Robin Murphy <robin.murphy@arm.com>,
Heiko Stuebner <heiko@sntech.de>
Subject: Re: [PATCH 1/5] phy: rockchip: add inno-usb3 phy driver
Date: Wed, 30 Oct 2019 13:50:32 -0400 [thread overview]
Message-ID: <CAMdYzYphK=R-3tw67xrutRv-fxOq7=dPXg5=4kT6bkivH77E0w@mail.gmail.com> (raw)
In-Reply-To: <1572404361.18464.24.camel@mhfsdcap03>
On Tue, Oct 29, 2019 at 10:59 PM Chunfeng Yun <chunfeng.yun@mediatek.com> wrote:
>
> On Tue, 2019-10-29 at 11:26 -0400, Peter Geis wrote:
> > On Mon, Oct 28, 2019 at 10:12 PM Chunfeng Yun <chunfeng.yun@mediatek.com> wrote:
> > >
> > > On Mon, 2019-10-28 at 18:22 +0000, Peter Geis wrote:
> > > > Add the rockchip innosilicon usb3 phy driver, supporting devices such as the rk3328.
> > > > Pulled from:
> > > > https://github.com/FireflyTeam/kernel/blob/roc-rk3328-cc/drivers/phy/rockchip/phy-rockchip-inno-usb3.c
> > > >
> > > > Signed-off-by: Peter Geis <pgwipeout@gmail.com>
> > > > ---
> > > > drivers/phy/rockchip/Kconfig | 9 +
> > > > drivers/phy/rockchip/Makefile | 1 +
> > > > drivers/phy/rockchip/phy-rockchip-inno-usb3.c | 1107 +++++++++++++++++
> > > > 3 files changed, 1117 insertions(+)
> > > > create mode 100644 drivers/phy/rockchip/phy-rockchip-inno-usb3.c
> > > >
> ...
> > > > +static int rk3328_u3phy_pipe_power(struct rockchip_u3phy *u3phy,
> > > > + struct rockchip_u3phy_port *u3phy_port,
> > > > + bool on)
> > > > +{
> > > > + unsigned int reg;
> > > > +
> > > > + if (on) {
> > > > + reg = readl(u3phy_port->base + 0x1a8);
> > > > + reg &= ~BIT(4); /* ldo power up */
> > > > + writel(reg, u3phy_port->base + 0x1a8);
> > > > +
> > > > + reg = readl(u3phy_port->base + 0x044);
> > > > + reg &= ~BIT(4); /* bg power on */
> > > > + writel(reg, u3phy_port->base + 0x044);
> > > > +
> > > > + reg = readl(u3phy_port->base + 0x150);
> > > > + reg |= BIT(6); /* tx bias enable */
> > > > + writel(reg, u3phy_port->base + 0x150);
> > > > +
> > > > + reg = readl(u3phy_port->base + 0x080);
> > > > + reg &= ~BIT(2); /* tx cm power up */
> > > > + writel(reg, u3phy_port->base + 0x080);
> > > > +
> > > > + reg = readl(u3phy_port->base + 0x0c0);
> > > > + /* tx obs enable and rx cm enable */
> > > > + reg |= (BIT(3) | BIT(4));
> > > > + writel(reg, u3phy_port->base + 0x0c0);
> > > > +
> > > > + udelay(1);
> > > > + } else {
> > > > + reg = readl(u3phy_port->base + 0x1a8);
> > > > + reg |= BIT(4); /* ldo power down */
> > > > + writel(reg, u3phy_port->base + 0x1a8);
> > > > +
> > > > + reg = readl(u3phy_port->base + 0x044);
> > > > + reg |= BIT(4); /* bg power down */
> > > > + writel(reg, u3phy_port->base + 0x044);
> > > > +
> > > > + reg = readl(u3phy_port->base + 0x150);
> > > > + reg &= ~BIT(6); /* tx bias disable */
> > > > + writel(reg, u3phy_port->base + 0x150);
> > > > +
> > > > + reg = readl(u3phy_port->base + 0x080);
> > > > + reg |= BIT(2); /* tx cm power down */
> > > > + writel(reg, u3phy_port->base + 0x080);
> > > > +
> > > > + reg = readl(u3phy_port->base + 0x0c0);
> > > > + /* tx obs disable and rx cm disable */
> > > > + reg &= ~(BIT(3) | BIT(4));
> > > > + writel(reg, u3phy_port->base + 0x0c0);
> > > > + }
> > > Try to avoid magic number
> >
> > Since this was not my driver, I only pulled it in and made the
> > necessary changes to get it working, I tried to refrain from
> > modifications as much as possible.
> > Do you want me to convert these addresses to definitions based on the
> > comments in the code?
> It's better to follow register names defined in register map doc if you
> have
Some of these registers appear to be in the rk3328 TRM.
Most, such as the tuning registers, are not documented anywhere I can find.
:'( Why rockchip, why?!
> >
> > >
> > > > +
> > > > + return 0;
> > > > +}
> > > > +
>
>
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
next prev parent reply other threads:[~2019-10-30 17:50 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-28 18:22 [PATCH 0/5] add rk3328 usb3 phy driver Peter Geis
2019-10-28 18:22 ` [PATCH 1/5] phy: rockchip: add inno-usb3 " Peter Geis
2019-10-29 2:11 ` Chunfeng Yun
2019-10-29 15:26 ` Peter Geis
2019-10-30 2:59 ` Chunfeng Yun
2019-10-30 17:50 ` Peter Geis [this message]
2019-10-30 8:15 ` Heiko Stuebner
2019-10-30 17:46 ` Peter Geis
2019-10-31 14:02 ` Peter Geis
2019-10-28 18:22 ` [PATCH 2/5] dt-bindings: clean up rockchip grf binding document Peter Geis
2019-10-31 14:25 ` Heiko Stuebner
2019-10-28 18:22 ` [PATCH 3/5] Documentation: bindings: add dt documentation for rockchip usb3 phy Peter Geis
2019-10-28 18:22 ` [PATCH 4/5] arm64: dts: rockchip: add usb3 to rk3328 devicetree Peter Geis
2019-10-29 1:58 ` Chunfeng Yun
2019-10-29 15:31 ` Peter Geis
2019-10-30 2:28 ` Chunfeng Yun
2019-10-30 17:54 ` Peter Geis
2019-10-28 18:22 ` [PATCH 5/5] arm64: dts: rockchip: enable usb3 on rk3328-roc-cc Peter Geis
2019-10-28 18:41 ` [PATCH 0/5] add rk3328 usb3 phy driver Robin Murphy
2019-10-30 0:17 ` Robin Murphy
2019-10-30 1:15 ` Peter Geis
2020-04-23 20:20 ` Peter Geis
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