From: Paul Cercueil <paul@crapouillou.net>
To: "Thierry Reding" <thierry.reding@gmail.com>,
"Daniel Lezcano" <daniel.lezcano@linaro.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Ralf Baechle" <ralf@linux-mips.org>,
"Paul Burton" <paul.burton@mips.com>,
"James Hogan" <jhogan@kernel.org>,
"Jonathan Corbet" <corbet@lwn.net>,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Cc: Mathieu Malaterre <malat@debian.org>,
od@zcrc.me, linux-pwm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-watchdog@vger.kernel.org, linux-mips@vger.kernel.org,
linux-doc@vger.kernel.org, linux-clk@vger.kernel.org,
Paul Cercueil <paul@crapouillou.net>
Subject: [PATCH v10 14/27] pwm: jz4740: Improve algorithm of clock calculation
Date: Sat, 2 Mar 2019 20:34:00 -0300 [thread overview]
Message-ID: <20190302233413.14813-15-paul@crapouillou.net> (raw)
In-Reply-To: <20190302233413.14813-1-paul@crapouillou.net>
The previous algorithm hardcoded details about how the TCU clocks work.
The new algorithm will use clk_round_rate to find the perfect clock rate
for the PWM channel.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Mathieu Malaterre <malat@debian.org>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
---
Notes:
v9: New patch
v10: - New algorithm. Instead of starting with the maximum clock rate
and using clk_round_rate(rate - 1) to get the next (smaller)
clock, we compute the maximum rate we can use before the
register overflows, and apply it with clk_set_max_rate.
Then we read the new clock rate and compute the register values
of the period and duty from that.
- Use NSEC_PER_SEC instead of magic 1000000000 value
drivers/pwm/pwm-jz4740.c | 49 ++++++++++++++++++++++++++++++++----------------
1 file changed, 33 insertions(+), 16 deletions(-)
diff --git a/drivers/pwm/pwm-jz4740.c b/drivers/pwm/pwm-jz4740.c
index c6136bd4434b..f497388fc818 100644
--- a/drivers/pwm/pwm-jz4740.c
+++ b/drivers/pwm/pwm-jz4740.c
@@ -110,24 +110,45 @@ static int jz4740_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
struct jz4740_pwm_chip *jz4740 = to_jz4740(pwm->chip);
struct clk *clk = jz4740->clks[pwm->hwpwm],
*parent_clk = clk_get_parent(clk);
- unsigned long rate, period, duty;
+ unsigned long rate, parent_rate, period, duty;
unsigned long long tmp;
- unsigned int prescaler = 0;
+ int ret;
- rate = clk_get_rate(parent_clk);
- tmp = (unsigned long long)rate * state->period;
- do_div(tmp, 1000000000);
- period = tmp;
+ parent_rate = clk_get_rate(parent_clk);
+
+ jz4740_pwm_disable(chip, pwm);
+
+ /* Reset the clock to the maximum rate, and we'll reduce it if needed */
+ ret = clk_set_rate(clk, parent_rate);
+ if (ret)
+ return ret;
- while (period > 0xffff && prescaler < 6) {
- period >>= 2;
- rate >>= 2;
- ++prescaler;
+ /* Limit the clock to a maximum rate that still gives us a period value
+ * which fits in 16 bits.
+ */
+ tmp = 0xffffull * NSEC_PER_SEC;
+ do_div(tmp, state->period);
+
+ ret = clk_set_max_rate(clk, tmp);
+ if (ret) {
+ dev_err(chip->dev, "Unable to set max rate: %i\n", ret);
+ return ret;
}
- if (prescaler == 6)
- return -EINVAL;
+ /* Read back the clock rate, as it may have been modified by
+ * clk_set_max_rate()
+ */
+ rate = clk_get_rate(clk);
+ if (rate != parent_rate)
+ dev_dbg(chip->dev, "PWM clock updated to %lu Hz\n", rate);
+
+ /* Calculate period value */
+ tmp = (unsigned long long)rate * state->period;
+ do_div(tmp, NSEC_PER_SEC);
+ period = (unsigned long)tmp;
+
+ /* Calculate duty value */
tmp = (unsigned long long)period * state->duty_cycle;
do_div(tmp, state->period);
duty = period - tmp;
@@ -135,14 +156,10 @@ static int jz4740_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
if (duty >= period)
duty = period - 1;
- jz4740_pwm_disable(chip, pwm);
-
/* Set abrupt shutdown */
regmap_update_bits(jz4740->map, TCU_REG_TCSRc(pwm->hwpwm),
TCU_TCSR_PWM_SD, TCU_TCSR_PWM_SD);
- clk_set_rate(clk, rate);
-
/* Reset counter to 0 */
regmap_write(jz4740->map, TCU_REG_TCNTc(pwm->hwpwm), 0);
--
2.11.0
next prev parent reply other threads:[~2019-03-02 23:36 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-02 23:33 [5.2][PATCH v10 00/27] Ingenic TCU patchset Paul Cercueil
2019-03-02 23:33 ` [PATCH v10 01/27] dt-bindings: ingenic: Add DT bindings for TCU clocks Paul Cercueil
2019-03-02 23:33 ` [PATCH v10 02/27] doc: Add doc for the Ingenic TCU hardware Paul Cercueil
2019-03-02 23:33 ` [PATCH v10 03/27] dt-bindings: Add doc for the Ingenic TCU drivers Paul Cercueil
2019-03-02 23:33 ` [PATCH v10 04/27] clocksource: Add a new timer-ingenic driver Paul Cercueil
2019-03-04 12:22 ` Thierry Reding
2019-03-04 18:13 ` Paul Cercueil
2019-03-08 10:22 ` Thierry Reding
2019-03-11 20:52 ` Paul Cercueil
2019-03-05 3:15 ` kbuild test robot
2019-03-02 23:33 ` [PATCH v10 05/27] clocksource: Add driver for the Ingenic JZ47xx OST Paul Cercueil
2019-03-02 23:33 ` [PATCH v10 06/27] MAINTAINERS: Add myself as maintainer for Ingenic TCU drivers Paul Cercueil
2019-03-02 23:33 ` [PATCH v10 07/27] watchdog: jz4740: Use WDT clock provided by TCU driver Paul Cercueil
2019-03-02 23:33 ` [PATCH v10 08/27] watchdog: jz4740: Use regmap " Paul Cercueil
2019-03-02 23:33 ` [PATCH v10 09/27] watchdog: jz4740: Avoid starting watchdog in set_timeout Paul Cercueil
2019-03-02 23:33 ` [PATCH v10 10/27] watchdog: jz4740: Drop dependency on MACH_JZ47xx, use COMPILE_TEST Paul Cercueil
2019-03-02 23:33 ` [PATCH v10 11/27] pwm: jz4740: Apply configuration atomically Paul Cercueil
2019-03-04 11:59 ` Thierry Reding
2019-03-02 23:33 ` [PATCH v10 12/27] pwm: jz4740: Use regmap from TCU driver Paul Cercueil
2019-03-04 12:24 ` Thierry Reding
2019-03-02 23:33 ` [PATCH v10 13/27] pwm: jz4740: Use clocks " Paul Cercueil
2019-03-04 12:30 ` Thierry Reding
2019-03-04 18:18 ` Paul Cercueil
2019-03-02 23:34 ` Paul Cercueil [this message]
2019-03-04 12:33 ` [PATCH v10 14/27] pwm: jz4740: Improve algorithm of clock calculation Thierry Reding
2019-03-02 23:34 ` [PATCH v10 15/27] pwm: jz4740: Allow selection of PWM channels 0 and 1 Paul Cercueil
2019-03-04 12:34 ` Thierry Reding
2019-03-02 23:34 ` [PATCH v10 16/27] pwm: jz4740: Drop dependency on MACH_INGENIC, use COMPILE_TEST Paul Cercueil
2019-03-02 23:34 ` [PATCH v10 17/27] pwm: jz4740: Remove unused devicetree compatible strings Paul Cercueil
2019-03-02 23:34 ` [PATCH v10 18/27] clk: jz4740: Add TCU clock Paul Cercueil
2019-03-02 23:34 ` [PATCH v10 19/27] MIPS: Kconfig: Select TCU timer driver when MACH_INGENIC is set Paul Cercueil
2019-03-02 23:34 ` [PATCH v10 20/27] MIPS: jz4740: Add DTS nodes for the TCU drivers Paul Cercueil
2019-03-02 23:34 ` [PATCH v10 21/27] MIPS: qi_lb60: Move PWM devices to devicetree Paul Cercueil
2019-03-02 23:34 ` [PATCH v10 22/27] MIPS: qi_lb60: Reduce system timer and clocksource to 750 kHz Paul Cercueil
2019-03-02 23:34 ` [PATCH v10 23/27] MIPS: CI20: Reduce system timer and clocksource to 3 MHz Paul Cercueil
2019-03-02 23:34 ` [PATCH v10 24/27] MIPS: CI20: defconfig: enable OST driver Paul Cercueil
2019-03-02 23:34 ` [PATCH v10 25/27] MIPS: GCW0: Reduce system timer and clocksource to 750 kHz Paul Cercueil
2019-03-02 23:34 ` [PATCH v10 26/27] MIPS: GCW0: defconfig: Enable OST, watchdog, PWM drivers Paul Cercueil
2019-03-02 23:34 ` [PATCH v10 27/27] MIPS: jz4740: Drop obsolete code Paul Cercueil
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