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From: "Luis R. Rodriguez" <lrodriguez@atheros.com>
To: linville@tuxdriver.com
Cc: linux-wireless@vger.kernel.org, Felix Fietkau <nbd@openwrt.org>,
	"Luis R. Rodriguez" <lrodriguez@atheros.com>
Subject: [PATCH v3 44/97] ath9k_hw: Split out the function for reading the noise floor
Date: Thu, 15 Apr 2010 17:38:49 -0400	[thread overview]
Message-ID: <1271367582-992-45-git-send-email-lrodriguez@atheros.com> (raw)
In-Reply-To: <1271367582-992-1-git-send-email-lrodriguez@atheros.com>

From: Felix Fietkau <nbd@openwrt.org>

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
---
 drivers/net/wireless/ath/ath9k/ar5008_phy.c |   50 ++++++++++++
 drivers/net/wireless/ath/ath9k/ar9002_phy.c |   53 +++++++++++++
 drivers/net/wireless/ath/ath9k/ar9003_phy.c |  110 +++++++++++++++++++++++++++
 drivers/net/wireless/ath/ath9k/calib.c      |   90 +---------------------
 drivers/net/wireless/ath/ath9k/hw-ops.h     |    6 ++
 drivers/net/wireless/ath/ath9k/hw.c         |    3 +
 drivers/net/wireless/ath/ath9k/hw.h         |   12 +++
 7 files changed, 235 insertions(+), 89 deletions(-)

diff --git a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
index dddca59..bd3792c 100644
--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
@@ -1198,6 +1198,55 @@ static bool ar5008_hw_ani_control(struct ath_hw *ah,
 	return true;
 }
 
+static void ar5008_hw_do_getnf(struct ath_hw *ah,
+			      int16_t nfarray[NUM_NF_READINGS])
+{
+	struct ath_common *common = ath9k_hw_common(ah);
+	int16_t nf;
+
+	nf = MS(REG_READ(ah, AR_PHY_CCA), AR_PHY_MINCCA_PWR);
+	if (nf & 0x100)
+		nf = 0 - ((nf ^ 0x1ff) + 1);
+	ath_print(common, ATH_DBG_CALIBRATE,
+		  "NF calibrated [ctl] [chain 0] is %d\n", nf);
+	nfarray[0] = nf;
+
+	nf = MS(REG_READ(ah, AR_PHY_CH1_CCA), AR_PHY_CH1_MINCCA_PWR);
+	if (nf & 0x100)
+		nf = 0 - ((nf ^ 0x1ff) + 1);
+	ath_print(common, ATH_DBG_CALIBRATE,
+		  "NF calibrated [ctl] [chain 1] is %d\n", nf);
+	nfarray[1] = nf;
+
+	nf = MS(REG_READ(ah, AR_PHY_CH2_CCA), AR_PHY_CH2_MINCCA_PWR);
+	if (nf & 0x100)
+		nf = 0 - ((nf ^ 0x1ff) + 1);
+	ath_print(common, ATH_DBG_CALIBRATE,
+		  "NF calibrated [ctl] [chain 2] is %d\n", nf);
+	nfarray[2] = nf;
+
+	nf = MS(REG_READ(ah, AR_PHY_EXT_CCA), AR_PHY_EXT_MINCCA_PWR);
+	if (nf & 0x100)
+		nf = 0 - ((nf ^ 0x1ff) + 1);
+	ath_print(common, ATH_DBG_CALIBRATE,
+		  "NF calibrated [ext] [chain 0] is %d\n", nf);
+	nfarray[3] = nf;
+
+	nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA), AR_PHY_CH1_EXT_MINCCA_PWR);
+	if (nf & 0x100)
+		nf = 0 - ((nf ^ 0x1ff) + 1);
+	ath_print(common, ATH_DBG_CALIBRATE,
+		  "NF calibrated [ext] [chain 1] is %d\n", nf);
+	nfarray[4] = nf;
+
+	nf = MS(REG_READ(ah, AR_PHY_CH2_EXT_CCA), AR_PHY_CH2_EXT_MINCCA_PWR);
+	if (nf & 0x100)
+		nf = 0 - ((nf ^ 0x1ff) + 1);
+	ath_print(common, ATH_DBG_CALIBRATE,
+		  "NF calibrated [ext] [chain 2] is %d\n", nf);
+	nfarray[5] = nf;
+}
+
 void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
 {
 	struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
@@ -1220,6 +1269,7 @@ void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
 	priv_ops->restore_chainmask = ar5008_restore_chainmask;
 	priv_ops->set_diversity = ar5008_set_diversity;
 	priv_ops->ani_control = ar5008_hw_ani_control;
+	priv_ops->do_getnf = ar5008_hw_do_getnf;
 
 	if (AR_SREV_9100(ah))
 		priv_ops->compute_pll_control = ar9100_hw_compute_pll_control;
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_phy.c b/drivers/net/wireless/ath/ath9k/ar9002_phy.c
index 1f8ac0a..a0a2f58 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.c
@@ -467,6 +467,58 @@ static u32 ar9002_hw_compute_pll_control(struct ath_hw *ah,
 	return pll;
 }
 
+static void ar9002_hw_do_getnf(struct ath_hw *ah,
+			      int16_t nfarray[NUM_NF_READINGS])
+{
+	struct ath_common *common = ath9k_hw_common(ah);
+	int16_t nf;
+
+	nf = MS(REG_READ(ah, AR_PHY_CCA), AR9280_PHY_MINCCA_PWR);
+
+	if (nf & 0x100)
+		nf = 0 - ((nf ^ 0x1ff) + 1);
+	ath_print(common, ATH_DBG_CALIBRATE,
+		  "NF calibrated [ctl] [chain 0] is %d\n", nf);
+
+	if (AR_SREV_9271(ah) && (nf >= -114))
+		nf = -116;
+
+	nfarray[0] = nf;
+
+	if (!AR_SREV_9285(ah) && !AR_SREV_9271(ah)) {
+		nf = MS(REG_READ(ah, AR_PHY_CH1_CCA),
+				AR9280_PHY_CH1_MINCCA_PWR);
+
+		if (nf & 0x100)
+			nf = 0 - ((nf ^ 0x1ff) + 1);
+		ath_print(common, ATH_DBG_CALIBRATE,
+			  "NF calibrated [ctl] [chain 1] is %d\n", nf);
+		nfarray[1] = nf;
+	}
+
+	nf = MS(REG_READ(ah, AR_PHY_EXT_CCA), AR9280_PHY_EXT_MINCCA_PWR);
+	if (nf & 0x100)
+		nf = 0 - ((nf ^ 0x1ff) + 1);
+	ath_print(common, ATH_DBG_CALIBRATE,
+		  "NF calibrated [ext] [chain 0] is %d\n", nf);
+
+	if (AR_SREV_9271(ah) && (nf >= -114))
+		nf = -116;
+
+	nfarray[3] = nf;
+
+	if (!AR_SREV_9285(ah) && !AR_SREV_9271(ah)) {
+		nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA),
+				AR9280_PHY_CH1_EXT_MINCCA_PWR);
+
+		if (nf & 0x100)
+			nf = 0 - ((nf ^ 0x1ff) + 1);
+		ath_print(common, ATH_DBG_CALIBRATE,
+			  "NF calibrated [ext] [chain 1] is %d\n", nf);
+		nfarray[4] = nf;
+	}
+}
+
 void ar9002_hw_attach_phy_ops(struct ath_hw *ah)
 {
 	struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
@@ -478,4 +530,5 @@ void ar9002_hw_attach_phy_ops(struct ath_hw *ah)
 	priv_ops->spur_mitigate_freq = ar9002_hw_spur_mitigate;
 	priv_ops->olc_init = ar9002_olc_init;
 	priv_ops->compute_pll_control = ar9002_hw_compute_pll_control;
+	priv_ops->do_getnf = ar9002_hw_do_getnf;
 }
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index c938b85..67b3b65 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -705,6 +705,115 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah,
 	return true;
 }
 
+static void ar9003_hw_nf_sanitize_2g(struct ath_hw *ah, s16 *nf)
+{
+	struct ath_common *common = ath9k_hw_common(ah);
+
+	if (*nf > ah->nf_2g_max) {
+		ath_print(common, ATH_DBG_CALIBRATE,
+			  "2 GHz NF (%d) > MAX (%d), "
+			  "correcting to MAX",
+			  *nf, ah->nf_2g_max);
+		*nf = ah->nf_2g_max;
+	} else if (*nf < ah->nf_2g_min) {
+		ath_print(common, ATH_DBG_CALIBRATE,
+			  "2 GHz NF (%d) < MIN (%d), "
+			  "correcting to MIN",
+			  *nf, ah->nf_2g_min);
+		*nf = ah->nf_2g_min;
+	}
+}
+
+static void ar9003_hw_nf_sanitize_5g(struct ath_hw *ah, s16 *nf)
+{
+	struct ath_common *common = ath9k_hw_common(ah);
+
+	if (*nf > ah->nf_5g_max) {
+		ath_print(common, ATH_DBG_CALIBRATE,
+			  "5 GHz NF (%d) > MAX (%d), "
+			  "correcting to MAX",
+			  *nf, ah->nf_5g_max);
+		*nf = ah->nf_5g_max;
+	} else if (*nf < ah->nf_5g_min) {
+		ath_print(common, ATH_DBG_CALIBRATE,
+			  "5 GHz NF (%d) < MIN (%d), "
+			  "correcting to MIN",
+			  *nf, ah->nf_5g_min);
+		*nf = ah->nf_5g_min;
+	}
+}
+
+static void ar9003_hw_nf_sanitize(struct ath_hw *ah, s16 *nf)
+{
+	if (IS_CHAN_2GHZ(ah->curchan))
+		ar9003_hw_nf_sanitize_2g(ah, nf);
+	else
+		ar9003_hw_nf_sanitize_5g(ah, nf);
+}
+
+static void ar9003_hw_do_getnf(struct ath_hw *ah,
+			      int16_t nfarray[NUM_NF_READINGS])
+{
+	struct ath_common *common = ath9k_hw_common(ah);
+	int16_t nf;
+
+	nf = MS(REG_READ(ah, AR_PHY_CCA_0), AR_PHY_MINCCA_PWR);
+	if (nf & 0x100)
+		nf = 0 - ((nf ^ 0x1ff) + 1);
+	ar9003_hw_nf_sanitize(ah, &nf);
+	ath_print(common, ATH_DBG_CALIBRATE,
+		  "NF calibrated [ctl] [chain 0] is %d\n", nf);
+	nfarray[0] = nf;
+
+	nf = MS(REG_READ(ah, AR_PHY_CCA_1), AR_PHY_CH1_MINCCA_PWR);
+	if (nf & 0x100)
+		nf = 0 - ((nf ^ 0x1ff) + 1);
+	ar9003_hw_nf_sanitize(ah, &nf);
+	ath_print(common, ATH_DBG_CALIBRATE,
+		  "NF calibrated [ctl] [chain 1] is %d\n", nf);
+	nfarray[1] = nf;
+
+	nf = MS(REG_READ(ah, AR_PHY_CCA_2), AR_PHY_CH2_MINCCA_PWR);
+	if (nf & 0x100)
+		nf = 0 - ((nf ^ 0x1ff) + 1);
+	ar9003_hw_nf_sanitize(ah, &nf);
+	ath_print(common, ATH_DBG_CALIBRATE,
+		  "NF calibrated [ctl] [chain 2] is %d\n", nf);
+	nfarray[2] = nf;
+
+	nf = MS(REG_READ(ah, AR_PHY_EXT_CCA), AR_PHY_EXT_MINCCA_PWR);
+	if (nf & 0x100)
+		nf = 0 - ((nf ^ 0x1ff) + 1);
+	ar9003_hw_nf_sanitize(ah, &nf);
+	ath_print(common, ATH_DBG_CALIBRATE,
+		  "NF calibrated [ext] [chain 0] is %d\n", nf);
+	nfarray[3] = nf;
+
+	nf = MS(REG_READ(ah, AR_PHY_EXT_CCA_1), AR_PHY_CH1_EXT_MINCCA_PWR);
+	if (nf & 0x100)
+		nf = 0 - ((nf ^ 0x1ff) + 1);
+	ar9003_hw_nf_sanitize(ah, &nf);
+	ath_print(common, ATH_DBG_CALIBRATE,
+		  "NF calibrated [ext] [chain 1] is %d\n", nf);
+	nfarray[4] = nf;
+
+	nf = MS(REG_READ(ah, AR_PHY_EXT_CCA_2), AR_PHY_CH2_EXT_MINCCA_PWR);
+	if (nf & 0x100)
+		nf = 0 - ((nf ^ 0x1ff) + 1);
+	ar9003_hw_nf_sanitize(ah, &nf);
+	ath_print(common, ATH_DBG_CALIBRATE,
+		  "NF calibrated [ext] [chain 2] is %d\n", nf);
+	nfarray[5] = nf;
+}
+
+void ar9003_hw_set_nf_limits(struct ath_hw *ah)
+{
+	ah->nf_2g_max = AR_PHY_CCA_MAX_GOOD_VAL_9300_2GHZ;
+	ah->nf_2g_min = AR_PHY_CCA_MIN_GOOD_VAL_9300_2GHZ;
+	ah->nf_5g_max = AR_PHY_CCA_MAX_GOOD_VAL_9300_5GHZ;
+	ah->nf_5g_min = AR_PHY_CCA_MIN_GOOD_VAL_9300_5GHZ;
+}
+
 void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
 {
 	struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
@@ -723,4 +832,5 @@ void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
 	priv_ops->enable_rfkill = ar9003_hw_enable_rfkill;
 	priv_ops->set_diversity = ar9003_hw_set_diversity;
 	priv_ops->ani_control = ar9003_hw_ani_control;
+	priv_ops->do_getnf = ar9003_hw_do_getnf;
 }
diff --git a/drivers/net/wireless/ath/ath9k/calib.c b/drivers/net/wireless/ath/ath9k/calib.c
index eba85ad..eed2c76 100644
--- a/drivers/net/wireless/ath/ath9k/calib.c
+++ b/drivers/net/wireless/ath/ath9k/calib.c
@@ -15,6 +15,7 @@
  */
 
 #include "hw.h"
+#include "hw-ops.h"
 #include "ar9002_phy.h"
 
 /* We can tune this as we go by monitoring really low values */
@@ -88,95 +89,6 @@ static void ath9k_hw_update_nfcal_hist_buffer(struct ath9k_nfcal_hist *h,
 	return;
 }
 
-static void ath9k_hw_do_getnf(struct ath_hw *ah,
-			      int16_t nfarray[NUM_NF_READINGS])
-{
-	struct ath_common *common = ath9k_hw_common(ah);
-	int16_t nf;
-
-	if (AR_SREV_9280_10_OR_LATER(ah))
-		nf = MS(REG_READ(ah, AR_PHY_CCA), AR9280_PHY_MINCCA_PWR);
-	else
-		nf = MS(REG_READ(ah, AR_PHY_CCA), AR_PHY_MINCCA_PWR);
-
-	if (nf & 0x100)
-		nf = 0 - ((nf ^ 0x1ff) + 1);
-	ath_print(common, ATH_DBG_CALIBRATE,
-		  "NF calibrated [ctl] [chain 0] is %d\n", nf);
-
-	if (AR_SREV_9271(ah) && (nf >= -114))
-		nf = -116;
-
-	nfarray[0] = nf;
-
-	if (!AR_SREV_9285(ah) && !AR_SREV_9271(ah)) {
-		if (AR_SREV_9280_10_OR_LATER(ah))
-			nf = MS(REG_READ(ah, AR_PHY_CH1_CCA),
-					AR9280_PHY_CH1_MINCCA_PWR);
-		else
-			nf = MS(REG_READ(ah, AR_PHY_CH1_CCA),
-					AR_PHY_CH1_MINCCA_PWR);
-
-		if (nf & 0x100)
-			nf = 0 - ((nf ^ 0x1ff) + 1);
-		ath_print(common, ATH_DBG_CALIBRATE,
-			  "NF calibrated [ctl] [chain 1] is %d\n", nf);
-		nfarray[1] = nf;
-
-		if (!AR_SREV_9280(ah) && !AR_SREV_9287(ah)) {
-			nf = MS(REG_READ(ah, AR_PHY_CH2_CCA),
-					AR_PHY_CH2_MINCCA_PWR);
-			if (nf & 0x100)
-				nf = 0 - ((nf ^ 0x1ff) + 1);
-			ath_print(common, ATH_DBG_CALIBRATE,
-				  "NF calibrated [ctl] [chain 2] is %d\n", nf);
-			nfarray[2] = nf;
-		}
-	}
-
-	if (AR_SREV_9280_10_OR_LATER(ah))
-		nf = MS(REG_READ(ah, AR_PHY_EXT_CCA),
-			AR9280_PHY_EXT_MINCCA_PWR);
-	else
-		nf = MS(REG_READ(ah, AR_PHY_EXT_CCA),
-			AR_PHY_EXT_MINCCA_PWR);
-
-	if (nf & 0x100)
-		nf = 0 - ((nf ^ 0x1ff) + 1);
-	ath_print(common, ATH_DBG_CALIBRATE,
-		  "NF calibrated [ext] [chain 0] is %d\n", nf);
-
-	if (AR_SREV_9271(ah) && (nf >= -114))
-		nf = -116;
-
-	nfarray[3] = nf;
-
-	if (!AR_SREV_9285(ah) && !AR_SREV_9271(ah)) {
-		if (AR_SREV_9280_10_OR_LATER(ah))
-			nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA),
-					AR9280_PHY_CH1_EXT_MINCCA_PWR);
-		else
-			nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA),
-					AR_PHY_CH1_EXT_MINCCA_PWR);
-
-		if (nf & 0x100)
-			nf = 0 - ((nf ^ 0x1ff) + 1);
-		ath_print(common, ATH_DBG_CALIBRATE,
-			  "NF calibrated [ext] [chain 1] is %d\n", nf);
-		nfarray[4] = nf;
-
-		if (!AR_SREV_9280(ah) && !AR_SREV_9287(ah)) {
-			nf = MS(REG_READ(ah, AR_PHY_CH2_EXT_CCA),
-					AR_PHY_CH2_EXT_MINCCA_PWR);
-			if (nf & 0x100)
-				nf = 0 - ((nf ^ 0x1ff) + 1);
-			ath_print(common, ATH_DBG_CALIBRATE,
-				  "NF calibrated [ext] [chain 2] is %d\n", nf);
-			nfarray[5] = nf;
-		}
-	}
-}
-
 static bool getNoiseFloorThresh(struct ath_hw *ah,
 				enum ieee80211_band band,
 				int16_t *nft)
diff --git a/drivers/net/wireless/ath/ath9k/hw-ops.h b/drivers/net/wireless/ath/ath9k/hw-ops.h
index a770107..e2b8ad4 100644
--- a/drivers/net/wireless/ath/ath9k/hw-ops.h
+++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
@@ -163,4 +163,10 @@ static inline bool ath9k_hw_ani_control(struct ath_hw *ah,
 	return ath9k_hw_private_ops(ah)->ani_control(ah, cmd, param);
 }
 
+static inline void ath9k_hw_do_getnf(struct ath_hw *ah,
+				     int16_t nfarray[NUM_NF_READINGS])
+{
+	return ath9k_hw_private_ops(ah)->do_getnf(ah, nfarray);
+}
+
 #endif /* ATH9K_HW_OPS_H */
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index aa80d43..2dcfaa9 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -1072,6 +1072,9 @@ static int __ath9k_hw_init(struct ath_hw *ah)
 	else
 		ah->tx_trig_level = (AR_FTRIG_512B >> AR_FTRIG_S);
 
+	if (AR_SREV_9300_20_OR_LATER(ah))
+		ar9003_hw_set_nf_limits(ah);
+
 	ath9k_init_nfcal_hist_buffer(ah);
 
 	common->state = ATH_HW_INITIALIZED;
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 1eceda2..7889ecb 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -513,6 +513,7 @@ struct ath_hw_private_ops {
 				   struct ath9k_channel *chan);
 	bool (*ani_control)(struct ath_hw *ah, enum ath9k_ani_cmd cmd,
 			    int param);
+	void (*do_getnf)(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]);
 };
 
 /**
@@ -553,6 +554,10 @@ struct ath_hw {
 	bool is_pciexpress;
 	bool need_an_top2_fixup;
 	u16 tx_trig_level;
+	s16 nf_2g_max;
+	s16 nf_2g_min;
+	s16 nf_5g_max;
+	s16 nf_5g_min;
 	u16 rfsilent;
 	u32 rfkill_gpio;
 	u32 rfkill_polarity;
@@ -818,6 +823,13 @@ void ath9k_hw_htc_resetinit(struct ath_hw *ah);
 void ath9k_hw_get_delta_slope_vals(struct ath_hw *ah, u32 coef_scaled,
 				   u32 *coef_mantissa, u32 *coef_exponent);
 
+/*
+ * Code specifric to AR9003, we stuff these here to avoid callbacks
+ * for older families
+ */
+void ar9003_hw_set_nf_limits(struct ath_hw *ah);
+
+/* Hardware family op attach helpers */
 void ar5008_hw_attach_phy_ops(struct ath_hw *ah);
 void ar9002_hw_attach_phy_ops(struct ath_hw *ah);
 void ar9003_hw_attach_phy_ops(struct ath_hw *ah);
-- 
1.6.3.3


  parent reply	other threads:[~2010-04-15 21:39 UTC|newest]

Thread overview: 103+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-04-15 21:38 [PATCH v3 00/97] ath9k: add AR9003 support Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 01/97] ath9k_hw: start building an abstraction layer for hardware routines Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 02/97] ath9k_hw: add silicon revision macros for AR9300 Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 03/97] ath9k_hw: add a macro for abstracting generic timer access Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 04/97] ath9k_hw: fix a missing hex prefix for a register mask Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 05/97] ath9k_hw: add simple register abstraction for some AR9300 registers Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 06/97] ath9k_hw: add support for GPIO differences on AR9003 Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 07/97] ath9k_hw: AR9003 does not have AR_RC_AHB skip its setting Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 08/97] ath9k_hw: remove wrapper ath9k_hw_write_regs() Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 09/97] ath9k_hw: Move some RF ops to the private callbacks Luis R. Rodriguez
2010-04-16 19:43   ` John W. Linville
2010-04-16 19:56     ` Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 10/97] ath9k_hw: skip PLL initialization on AR9003 on Power-On-Reset Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 11/97] ath9k_hw: add some comments for ath9k_set_power_network_sleep() Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 12/97] ath9k_hw: add a private callback for PLL control computation Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 13/97] ath9k_hw: Add the PCI IDs for AR9300 and fill up the pci_id_tables Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 14/97] ath9k_hw: Add AR9003 PHY support Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 15/97] ath9k_hw: move init config and default after chip is up Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 16/97] ath9k_hw: add the AR9003 ar9003_hw_macversion_supported() Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 17/97] ath9k_hw: disable ANI for AR9003 Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 18/97] ath9k: disable the MIB interrupt if ANI is disabled Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 19/97] ath9k_hw: Add hw cap flag for EDMA for the AR9003 family Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 20/97] ath9k_hw: Fill few hw cap for edma Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 21/97] ath9k_hw: Add abstraction for rx enable Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 22/97] ath9k_hw: Fill rx_enable() for the AR9003 hardware family Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 23/97] ath9k_hw: Add few routines for rx edma support Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 24/97] ath9k_hw: update the chip tests for AR9003 Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 25/97] ath9k_hw: prevent reset control register zeroing on AR9003 reset Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 26/97] ath9k_hw: Add AR9003 PHY register definitions Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 27/97] ath9k_hw: add common channel select helpers for ar900[23] Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 28/97] ath9k_hw: Set the channel on AR9003 Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 29/97] ath9k_hw: Implement PLL control " Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 30/97] ath9k_hw: Implement spur mitigation " Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 31/97] ath9k_hw: split initvals.h by hardware family Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 32/97] ath9k_hw: add initvals for the AR9003 " Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 33/97] ath9k_hw: add helpers for processing the AR9003 INI Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 34/97] ath9k_hw: Split off ANI control to the PHY ops Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 35/97] ath9k_hw: add all the AR9003 PHY callbacks Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 36/97] ath9k_hw: Define tx control struct for AR9003 Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 37/97] ath9k_hw: Move code which populates ds_data to ath9k_hw Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 38/97] ath9k_hw: Add abstraction to set/get link pointer Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 39/97] ath9k: Use abstraction to get " Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 40/97] ath9k: Use memcpy in ath_clone_txbuf() Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 41/97] ath9k: Remove ATH9K_TX_SW_ABORTED and introduce a bool for this purpose Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 42/97] ath9k: Make bf_desc of ath_buf opaque Luis R. Rodriguez
2010-04-16 22:00   ` Pavel Roskin
2010-04-16 22:09     ` Felix Fietkau
2010-04-19 15:53       ` Pavel Roskin
2010-04-15 21:38 ` [PATCH v3 43/97] ath9k: Add Rx EDMA support Luis R. Rodriguez
2010-04-15 21:38 ` Luis R. Rodriguez [this message]
2010-04-15 21:38 ` [PATCH v3 45/97] ath9k_hw: the eep_map is used only for AR9280 PCI card ini fixup Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 46/97] ath9k_hw: add a helper for Power Amplifier calibration for AR9002 Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 47/97] ath9k_hw: add a helper for the OLC tem compensation " Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 48/97] ath9k_hw: rename PA calib for AR9287 Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 49/97] ath9k_hw: shift code for AR9280 OLC temp comp Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 50/97] ath9k_hw: move the AR9280 OLC temp comp to its own helper Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 51/97] ath9k_hw: simplify OLC temp compensation for AR9002 Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 52/97] ath9k_hw: rename the PA calib routines to match their families Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 53/97] ath9k_hw: rename getNoiseFloorThresh() to ath9k_hw_loadnf() Luis R. Rodriguez
2010-04-15 21:38 ` [PATCH v3 54/97] ath9k_hw: move the cal AR9100 calibration settings Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 55/97] ath9k_hw: split calib code by hardware families Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 56/97] ath9k_hw: add the AR9003 ar9003_hw_init_cal callback Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 57/97] ath9k_hw: add the config_pci_powersave AR9003 callback Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 58/97] ath9k_hw: split the generic hardware code by hardware family Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 59/97] ath9k_hw: move the cck channel 14 INI to the AR9002 hw code Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 60/97] ath9k_hw: move TX/RX gain INI stuff to its own hardware family code Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 61/97] ath9k_hw: Abstract the routine which returns interrupt status Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 62/97] ath9k_hw: Initialize interrupt mask for AR9003 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 63/97] ath9k_hw: abstract the AR_PHY_AGC_CONTROL register access Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 64/97] ath9k_hw: abstract loading noisefloor Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 65/97] ath9k_hw: fill in the callbacks for calibration for AR9003 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 66/97] ath9k_hw: complete AR9003 calibration Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 67/97] ath9k_hw: rename eep_AR9287_ops to eep_ar9287_ops Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 68/97] ath9k_hw: restore mac address reading logic Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 69/97] ath9k_hw: Implement AR9003 eeprom callbacks Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 70/97] ath9k_hw: add OFDM spur mitigation for AR9003 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 71/97] ath9k_hw: Fill get_isr() " Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 72/97] ath9k_hw: move AR9280 PCI EEPROM fix to eeprom_def.c Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 73/97] ath9k_hw: move the RF claim stuff to AR9002 hardware family Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 74/97] ath9k_hw: Configure Tx interrupt mitigation timer Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 75/97] ath9k_hw: add the AR9300 SREV hw name print Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 76/97] ath9k_hw: add TX/RX gain register initialization for AR9003 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 77/97] ath9k_hw: Update ath9k_hw_set_dma for AR9300 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 78/97] ath9k_hw: skip asynch fifo enablement to AR9003 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 79/97] ath9k_hw: skip WEP aggregation enable code for AR9003 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 80/97] ath9k: Load SW filtered NF values and start NF cal during full reset " Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 81/97] ath9k_hw: Define abstraction for tx desc access Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 82/97] ath9k_hw: Add function to configure tx status ring buffer Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 83/97] ath9k_hw: move AR9002 mac ops to its own file Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 84/97] ath9k_hw: Fill descriptor abstrations for AR9003 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 85/97] ath9k: add RXLP and RXHP to debugfs counters Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 86/97] ath9k_hw: enable CRC check of descriptors for AR9003 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 87/97] ath9k_hw: set cwmin and cwmax to 0 for for AR9003 upon txq reset Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 88/97] ath9k: Setup appropriate tx desc for regular dma and edma Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 89/97] ath9k: Initialize and configure tx status for EDMA Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 90/97] ath9k_hw: Compute pointer checksum over the link descriptor Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 91/97] ath9k: Add Tx EDMA support Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 92/97] mac80211: add LDPC control flag Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 93/97] ath9k_hw: add LDPC support for AR9003 Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 94/97] ath9k: add LDPC support Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 95/97] ath9k: Enable TXOK and TXERR interrupts for TX EDMA Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 96/97] ath9k_hw: Abort rx if hw is not coming out of full sleep in reset Luis R. Rodriguez
2010-04-15 21:39 ` [PATCH v3 97/97] ath9k_hw: add the PCI ID for the first AR9300 device Luis R. Rodriguez

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