From: Shengjiu Wang <shengjiu.wang@nxp.com>
To: timur@kernel.org, nicoleotsuka@gmail.com, Xiubo.Lee@gmail.com,
festevam@gmail.com, broonie@kernel.org,
alsa-devel@alsa-project.org, lgirdwood@gmail.com, perex@perex.cz,
tiwai@suse.com, robh+dt@kernel.org, mark.rutland@arm.com,
devicetree@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: [PATCH 2/3] ASoC: dt-bindings: fsl_easrc: Add document for EASRC
Date: Wed, 12 Feb 2020 12:30:02 +0800 [thread overview]
Message-ID: <1ae9af586a2003e23885ccc7ef58ee2b1dce29f7.1581475981.git.shengjiu.wang@nxp.com> (raw)
In-Reply-To: <cover.1581475981.git.shengjiu.wang@nxp.com>
In-Reply-To: <cover.1581475981.git.shengjiu.wang@nxp.com>
EASRC (Enhanced Asynchronous Sample Rate Converter) is a new
IP module found on i.MX815.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
---
.../devicetree/bindings/sound/fsl,easrc.txt | 57 +++++++++++++++++++
1 file changed, 57 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/fsl,easrc.txt
diff --git a/Documentation/devicetree/bindings/sound/fsl,easrc.txt b/Documentation/devicetree/bindings/sound/fsl,easrc.txt
new file mode 100644
index 000000000000..0e8153165e3b
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/fsl,easrc.txt
@@ -0,0 +1,57 @@
+NXP Asynchronous Sample Rate Converter (ASRC) Controller
+
+The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of a
+signal associated with an input clock into a signal associated with a different
+output clock. The driver currently works as a Front End of DPCM with other Back
+Ends Audio controller such as ESAI, SSI and SAI. It has four context to support
+four substreams within totally 32 channels.
+
+Required properties:
+- compatible: Contains "fsl,imx8mn-easrc".
+
+- reg: Offset and length of the register set for the
+ device.
+
+- interrupts: Contains the asrc interrupt.
+
+- dmas: Generic dma devicetree binding as described in
+ Documentation/devicetree/bindings/dma/dma.txt.
+
+- dma-names: Contains "ctx0_rx", "ctx0_tx",
+ "ctx1_rx", "ctx1_tx",
+ "ctx2_rx", "ctx2_tx",
+ "ctx3_rx", "ctx3_tx".
+
+- clocks: Contains an entry for each entry in clock-names.
+
+- clock-names: "mem" - Peripheral clock to driver module.
+
+- fsl,easrc-ram-script-name: The coefficient table for the filters
+
+- fsl,asrc-rate: Defines a mutual sample rate used by DPCM Back
+ Ends.
+
+- fsl,asrc-width: Defines a mutual sample width used by DPCM Back
+ Ends.
+
+Example:
+
+easrc: easrc@300C0000 {
+ compatible = "fsl,imx8mn-easrc";
+ reg = <0x0 0x300C0000 0x0 0x10000>;
+ interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
+ clock-names = "mem";
+ dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
+ <&sdma2 18 23 0> , <&sdma2 19 23 0>,
+ <&sdma2 20 23 0> , <&sdma2 21 23 0>,
+ <&sdma2 22 23 0> , <&sdma2 23 23 0>;
+ dma-names = "ctx0_rx", "ctx0_tx",
+ "ctx1_rx", "ctx1_tx",
+ "ctx2_rx", "ctx2_tx",
+ "ctx3_rx", "ctx3_tx";
+ fsl,easrc-ram-script-name = "imx/easrc/easrc-imx8mn.bin";
+ fsl,asrc-rate = <8000>;
+ fsl,asrc-width = <16>;
+ status = "disabled";
+};
--
2.21.0
next prev parent reply other threads:[~2020-02-12 4:41 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-12 4:30 [PATCH 0/3] Add new module driver for new ASRC Shengjiu Wang
2020-02-12 4:30 ` [PATCH 1/3] ASoC: fsl_asrc: Move common definition to fsl_asrc_common Shengjiu Wang
2020-02-12 4:30 ` Shengjiu Wang [this message]
2020-02-12 17:24 ` [PATCH 2/3] ASoC: dt-bindings: fsl_easrc: Add document for EASRC Fabio Estevam
2020-02-13 2:10 ` [alsa-devel] " Shengjiu Wang
2020-02-12 4:30 ` [PATCH 3/3] ASoC: fsl_easrc: Add EASRC ASoC CPU DAI and platform drivers Shengjiu Wang
2020-02-12 5:11 ` [PATCH 0/3] Add new module driver for new ASRC Randy Dunlap
2020-02-12 7:06 ` [alsa-devel] " Shengjiu Wang
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