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From: Nicholas Piggin <npiggin@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: Nicholas Piggin <npiggin@gmail.com>
Subject: [PATCH v2 01/20] powerpc/64s/exception: Introduce INT_DEFINE parameter block for code generation
Date: Wed,  4 Sep 2019 21:55:16 +1000	[thread overview]
Message-ID: <20190904115535.18559-2-npiggin@gmail.com> (raw)
In-Reply-To: <20190904115535.18559-1-npiggin@gmail.com>

The code generation macro arguments are difficult to read, and
defaults can't easily be used.

This introduces a block where parameters can be set for interrupt
handler code generation by the subsequent macros, and adds the first
generation macro for interrupt entry.

One interrupt handler is converted to the new macros to demonstrate
the change, the rest will be coverted all at once.

No generated code change.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 arch/powerpc/kernel/exceptions-64s.S | 77 ++++++++++++++++++++++++++--
 1 file changed, 73 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index d0018dd17e0a..e6ad6e6cf65e 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -193,6 +193,61 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
 	mtctr	reg;							\
 	bctr
 
+/*
+ * Interrupt code generation macros
+ */
+#define IVEC		.L_IVEC_\name\()
+#define IHSRR		.L_IHSRR_\name\()
+#define IAREA		.L_IAREA_\name\()
+#define IDAR		.L_IDAR_\name\()
+#define IDSISR		.L_IDSISR_\name\()
+#define ISET_RI		.L_ISET_RI_\name\()
+#define IEARLY		.L_IEARLY_\name\()
+#define IMASK		.L_IMASK_\name\()
+#define IKVM_REAL	.L_IKVM_REAL_\name\()
+#define IKVM_VIRT	.L_IKVM_VIRT_\name\()
+
+#define INT_DEFINE_BEGIN(n)						\
+.macro int_define_ ## n name
+
+#define INT_DEFINE_END(n)						\
+.endm ;									\
+int_define_ ## n n ;							\
+do_define_int n
+
+.macro do_define_int name
+	.ifndef IVEC
+		.error "IVEC not defined"
+	.endif
+	.ifndef IHSRR
+		IHSRR=EXC_STD
+	.endif
+	.ifndef IAREA
+		IAREA=PACA_EXGEN
+	.endif
+	.ifndef IDAR
+		IDAR=0
+	.endif
+	.ifndef IDSISR
+		IDSISR=0
+	.endif
+	.ifndef ISET_RI
+		ISET_RI=1
+	.endif
+	.ifndef IEARLY
+		IEARLY=0
+	.endif
+	.ifndef IMASK
+		IMASK=0
+	.endif
+	.ifndef IKVM_REAL
+		IKVM_REAL=0
+	.endif
+	.ifndef IKVM_VIRT
+		IKVM_VIRT=0
+	.endif
+.endm
+
 .macro INT_KVM_HANDLER name, vec, hsrr, area, skip
 	TRAMP_KVM_BEGIN(\name\()_kvm)
 	KVM_HANDLER \vec, \hsrr, \area, \skip
@@ -474,7 +529,7 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
 	 */
 	GET_SCRATCH0(r10)
 	std	r10,\area\()+EX_R13(r13)
-	.if \dar
+	.if \dar == 1
 	.if \hsrr
 	mfspr	r10,SPRN_HDAR
 	.else
@@ -482,7 +537,7 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
 	.endif
 	std	r10,\area\()+EX_DAR(r13)
 	.endif
-	.if \dsisr
+	.if \dsisr == 1
 	.if \hsrr
 	mfspr	r10,SPRN_HDSISR
 	.else
@@ -506,6 +561,14 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
 	.endif
 .endm
 
+.macro GEN_INT_ENTRY name, virt, ool=0
+	.if ! \virt
+		INT_HANDLER \name, IVEC, \ool, IEARLY, \virt, IHSRR, IAREA, ISET_RI, IDAR, IDSISR, IMASK, IKVM_REAL
+	.else
+		INT_HANDLER \name, IVEC, \ool, IEARLY, \virt, IHSRR, IAREA, ISET_RI, IDAR, IDSISR, IMASK, IKVM_VIRT
+	.endif
+.endm
+
 /*
  * On entry r13 points to the paca, r9-r13 are saved in the paca,
  * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
@@ -1143,12 +1206,18 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
 	bl	unrecoverable_exception
 	b	.
 
+INT_DEFINE_BEGIN(data_access)
+	IVEC=0x300
+	IDAR=1
+	IDSISR=1
+	IKVM_REAL=1
+INT_DEFINE_END(data_access)
 
 EXC_REAL_BEGIN(data_access, 0x300, 0x80)
-	INT_HANDLER data_access, 0x300, ool=1, dar=1, dsisr=1, kvm=1
+	GEN_INT_ENTRY data_access, virt=0, ool=1
 EXC_REAL_END(data_access, 0x300, 0x80)
 EXC_VIRT_BEGIN(data_access, 0x4300, 0x80)
-	INT_HANDLER data_access, 0x300, virt=1, dar=1, dsisr=1
+	GEN_INT_ENTRY data_access, virt=1
 EXC_VIRT_END(data_access, 0x4300, 0x80)
 INT_KVM_HANDLER data_access, 0x300, EXC_STD, PACA_EXGEN, 1
 EXC_COMMON_BEGIN(data_access_common)
-- 
2.22.0


  reply	other threads:[~2019-09-04 11:59 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-04 11:55 [PATCH v2 00/20] remaining interrupt handler changes Nicholas Piggin
2019-09-04 11:55 ` Nicholas Piggin [this message]
2019-09-04 11:55 ` [PATCH v2 02/20] powerpc/64s/exception: Add GEN_COMMON macro that uses INT_DEFINE parameters Nicholas Piggin
2019-09-04 11:55 ` [PATCH v2 03/20] powerpc/64s/exception: Add GEN_KVM " Nicholas Piggin
2019-09-04 11:55 ` [PATCH v2 04/20] powerpc/64s/exception: Expand EXC_COMMON and EXC_COMMON_ASYNC macros Nicholas Piggin
2019-09-04 11:55 ` [PATCH v2 05/20] powerpc/64s/exception: Move all interrupt handlers to new style code gen macros Nicholas Piggin
2019-09-04 11:55 ` [PATCH v2 06/20] powerpc/64s/exception: Remove old INT_ENTRY macro Nicholas Piggin
2019-09-04 11:55 ` [PATCH v2 07/20] powerpc/64s/exception: Remove old INT_COMMON macro Nicholas Piggin
2019-09-04 11:55 ` [PATCH v2 08/20] powerpc/64s/exception: Remove old INT_KVM_HANDLER Nicholas Piggin
2019-09-04 11:55 ` [PATCH v2 09/20] powerpc/64s/exception: Add ISIDE option Nicholas Piggin
2019-09-04 11:55 ` [PATCH v2 10/20] powerpc/64s/exception: move real->virt switch into the common handler Nicholas Piggin
2019-09-04 11:55 ` [PATCH v2 11/20] powerpc/64s/exception: move soft-mask test to common code Nicholas Piggin
2019-09-04 11:55 ` [PATCH v2 12/20] powerpc/64s/exception: move KVM " Nicholas Piggin
2019-09-04 11:55 ` [PATCH v2 13/20] powerpc/64s/exception: remove confusing IEARLY option Nicholas Piggin
2019-09-04 11:55 ` [PATCH v2 14/20] powerpc/64s/exception: remove the SPR saving patch code macros Nicholas Piggin
2019-09-04 11:55 ` [PATCH v2 15/20] powerpc/64s/exception: trim unused arguments from KVMTEST macro Nicholas Piggin
2019-09-04 11:55 ` [PATCH v2 16/20] powerpc/64s/exception: hdecrementer avoid touching the stack Nicholas Piggin
2019-09-04 11:55 ` [PATCH v2 17/20] powerpc/64s/exception: re-inline some handlers Nicholas Piggin
2019-09-04 11:55 ` [PATCH v2 18/20] powerpc/64s/exception: Clean up SRR specifiers Nicholas Piggin
2019-09-04 11:55 ` [PATCH v2 19/20] powerpc/64s/exception: add more comments for interrupt handlers Nicholas Piggin
2019-09-04 11:55 ` [PATCH v2 20/20] powerpc/64s/exception: only test KVM in SRR interrupts when PR KVM is supported Nicholas Piggin

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