From: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>
To: linux-mm@kvack.org, akpm@linux-foundation.org
Cc: kaleshsingh@google.com, npiggin@gmail.com,
"Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>,
joel@joelfernandes.org, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH v4 7/9] mm/mremap: Move TLB flush outside page table lock
Date: Wed, 14 Apr 2021 14:29:13 +0530 [thread overview]
Message-ID: <20210414085915.301189-8-aneesh.kumar@linux.ibm.com> (raw)
In-Reply-To: <20210414085915.301189-1-aneesh.kumar@linux.ibm.com>
Move TLB flush outside page table lock so that kernel does
less with page table lock held. Releasing the ptl with old
TLB contents still valid will behave such that such access
happened before the level3 or level2 entry update.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
---
mm/mremap.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/mm/mremap.c b/mm/mremap.c
index 0e7b11daafee..7ac1df8e6d51 100644
--- a/mm/mremap.c
+++ b/mm/mremap.c
@@ -259,7 +259,7 @@ static bool move_normal_pmd(struct vm_area_struct *vma, unsigned long old_addr,
* We don't have to worry about the ordering of src and dst
* ptlocks because exclusive mmap_lock prevents deadlock.
*/
- old_ptl = pmd_lock(vma->vm_mm, old_pmd);
+ old_ptl = pmd_lock(mm, old_pmd);
new_ptl = pmd_lockptr(mm, new_pmd);
if (new_ptl != old_ptl)
spin_lock_nested(new_ptl, SINGLE_DEPTH_NESTING);
@@ -271,11 +271,11 @@ static bool move_normal_pmd(struct vm_area_struct *vma, unsigned long old_addr,
VM_BUG_ON(!pmd_none(*new_pmd));
pmd_populate(mm, new_pmd, (pgtable_t)pmd_page_vaddr(pmd));
- flush_pte_tlb_pwc_range(vma, old_addr, old_addr + PMD_SIZE, true);
if (new_ptl != old_ptl)
spin_unlock(new_ptl);
spin_unlock(old_ptl);
+ flush_pte_tlb_pwc_range(vma, old_addr, old_addr + PMD_SIZE, true);
return true;
}
#else
@@ -306,7 +306,7 @@ static bool move_normal_pud(struct vm_area_struct *vma, unsigned long old_addr,
* We don't have to worry about the ordering of src and dst
* ptlocks because exclusive mmap_lock prevents deadlock.
*/
- old_ptl = pud_lock(vma->vm_mm, old_pud);
+ old_ptl = pud_lock(mm, old_pud);
new_ptl = pud_lockptr(mm, new_pud);
if (new_ptl != old_ptl)
spin_lock_nested(new_ptl, SINGLE_DEPTH_NESTING);
@@ -318,11 +318,11 @@ static bool move_normal_pud(struct vm_area_struct *vma, unsigned long old_addr,
VM_BUG_ON(!pud_none(*new_pud));
pud_populate(mm, new_pud, (pmd_t *)pud_page_vaddr(pud));
- flush_pte_tlb_pwc_range(vma, old_addr, old_addr + PUD_SIZE, true);
if (new_ptl != old_ptl)
spin_unlock(new_ptl);
spin_unlock(old_ptl);
+ flush_pte_tlb_pwc_range(vma, old_addr, old_addr + PUD_SIZE, true);
return true;
}
#else
--
2.30.2
next prev parent reply other threads:[~2021-04-14 9:03 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-14 8:59 [PATCH v4 0/9] Speedup mremap on ppc64 Aneesh Kumar K.V
2021-04-14 8:59 ` [PATCH v4 1/9] selftest/mremap_test: Update the test to handle pagesize other than 4K Aneesh Kumar K.V
2021-04-14 8:59 ` [PATCH v4 2/9] selftest/mremap_test: Avoid crash with static build Aneesh Kumar K.V
2021-04-14 8:59 ` [PATCH v4 3/9] mm/mremap: Use pmd/pud_poplulate to update page table entries Aneesh Kumar K.V
2021-04-14 8:59 ` [PATCH v4 4/9] powerpc/mm/book3s64: Fix possible build error Aneesh Kumar K.V
2021-04-20 3:43 ` Michael Ellerman
2021-04-14 8:59 ` [PATCH v4 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument Aneesh Kumar K.V
2021-04-14 8:59 ` [PATCH v4 6/9] mm/mremap: Use range flush that does TLB and page walk cache flush Aneesh Kumar K.V
2021-04-20 3:47 ` Michael Ellerman
2021-04-20 4:17 ` Aneesh Kumar K.V
2021-04-14 8:59 ` Aneesh Kumar K.V [this message]
2021-04-14 8:59 ` [PATCH v4 8/9] mm/mremap: Allow arch runtime override Aneesh Kumar K.V
2021-04-20 3:52 ` Michael Ellerman
2021-04-20 4:30 ` Aneesh Kumar K.V
2021-04-14 8:59 ` [PATCH v4 9/9] powerpc/mm: Enable move pmd/pud Aneesh Kumar K.V
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