From: Christophe Leroy <christophe.leroy@c-s.fr>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
Michael Ellerman <mpe@ellerman.id.au>,
aneesh.kumar@linux.vnet.ibm.com
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH v5 08/22] powerpc/mm: Enable 512k hugepage support with HW assistance on the 8xx
Date: Tue, 25 Sep 2018 16:50:54 +0000 (UTC) [thread overview]
Message-ID: <295f4d4bf213e8f07b6bc80d322607112bb7cedc.1537892499.git.christophe.leroy@c-s.fr> (raw)
In-Reply-To: <cover.1537892498.git.christophe.leroy@c-s.fr>
For using 512k pages with hardware assistance, the PTEs have to be spread
every 128 bytes in the L2 table.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/include/asm/hugetlb.h | 4 +++-
arch/powerpc/mm/hugetlbpage.c | 13 +++++++++++++
arch/powerpc/mm/tlb_nohash.c | 3 +++
3 files changed, 19 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h
index e13843556414..b22f164216ad 100644
--- a/arch/powerpc/include/asm/hugetlb.h
+++ b/arch/powerpc/include/asm/hugetlb.h
@@ -75,7 +75,9 @@ static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr,
unsigned long idx = 0;
pte_t *dir = hugepd_page(hpd);
-#ifndef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_8xx
+ idx = (addr & ((1UL << pdshift) - 1)) >> PAGE_SHIFT;
+#elif !defined(CONFIG_PPC_FSL_BOOK3E)
idx = (addr & ((1UL << pdshift) - 1)) >> hugepd_shift(hpd);
#endif
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 16846649499b..527ea2451cc2 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -66,7 +66,11 @@ static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
cachep = PGT_CACHE(PTE_T_ORDER);
num_hugepd = 1 << (pshift - pdshift);
} else {
+#ifdef CONFIG_PPC_8xx
+ cachep = PGT_CACHE(PTE_SHIFT);
+#else
cachep = PGT_CACHE(pdshift - pshift);
+#endif
num_hugepd = 1;
}
@@ -330,8 +334,13 @@ static void free_hugepd_range(struct mmu_gather *tlb, hugepd_t *hpdp, int pdshif
if (shift >= pdshift)
hugepd_free(tlb, hugepte);
else
+#ifdef CONFIG_PPC_8xx
+ pgtable_free_tlb(tlb, hugepte,
+ get_hugepd_cache_index(PTE_SHIFT));
+#else
pgtable_free_tlb(tlb, hugepte,
get_hugepd_cache_index(pdshift - shift));
+#endif
}
static void hugetlb_free_pmd_range(struct mmu_gather *tlb, pud_t *pud,
@@ -699,7 +708,11 @@ static int __init hugetlbpage_init(void)
* use pgt cache for hugepd.
*/
if (pdshift > shift)
+#ifdef CONFIG_PPC_8xx
+ pgtable_cache_add(PTE_SHIFT);
+#else
pgtable_cache_add(pdshift - shift);
+#endif
#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_8xx)
else
pgtable_cache_add(PTE_T_ORDER);
diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c
index 49441963d285..15fe5f0c8665 100644
--- a/arch/powerpc/mm/tlb_nohash.c
+++ b/arch/powerpc/mm/tlb_nohash.c
@@ -97,6 +97,9 @@ struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT] = {
.shift = 14,
},
#endif
+ [MMU_PAGE_512K] = {
+ .shift = 19,
+ },
[MMU_PAGE_8M] = {
.shift = 23,
},
--
2.13.3
next prev parent reply other threads:[~2018-09-25 16:50 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-25 16:50 [PATCH v5 00/22] Implement use of HW assistance on TLB table walk on 8xx Christophe Leroy
2018-09-25 16:50 ` [PATCH v5 01/22] Revert "powerpc/8xx: Use L1 entry APG to handle _PAGE_ACCESSED for CONFIG_SWAP" Christophe Leroy
2018-09-25 16:50 ` [PATCH v5 02/22] powerpc/code-patching: add a helper to get the address of a patch_site Christophe Leroy
2018-09-25 16:50 ` [PATCH v5 03/22] powerpc/8xx: Use patch_site for memory setup patching Christophe Leroy
2018-09-25 16:50 ` [PATCH v5 04/22] powerpc/8xx: Use patch_site for perf counters setup Christophe Leroy
2018-09-25 16:50 ` [PATCH v5 05/22] powerpc/8xx: Move SW perf counters in first 32kb of memory Christophe Leroy
2018-09-25 16:50 ` [PATCH v5 06/22] powerpc/8xx: Temporarily disable 16k pages and 512k hugepages Christophe Leroy
2018-09-25 16:50 ` [PATCH v5 07/22] powerpc/mm: Use hardware assistance in TLB handlers on the 8xx Christophe Leroy
2018-09-25 16:50 ` Christophe Leroy [this message]
2018-09-25 16:50 ` [PATCH v5 09/22] powerpc/8xx: don't use r12/SPRN_SPRG_SCRATCH2 in TLB Miss handlers Christophe Leroy
2018-09-25 16:50 ` [PATCH v5 10/22] powerpc/8xx: regroup TLB handler routines Christophe Leroy
2018-09-25 16:51 ` [PATCH v5 11/22] powerpc/mm: don't use pte_alloc_one_kernel() before slab is available Christophe Leroy
2018-09-25 16:51 ` [PATCH v5 12/22] powerpc/mm: inline pte_alloc_one() and pte_alloc_one_kernel() in PPC32 Christophe Leroy
2018-09-25 16:51 ` [PATCH v5 13/22] powerpc/book3s32: Remove CONFIG_BOOKE dependent code Christophe Leroy
2018-09-25 16:51 ` [PATCH v5 14/22] powerpc/mm: Move pte_fragment_alloc() to a common location Christophe Leroy
2018-09-26 2:43 ` Aneesh Kumar K.V
2018-09-25 16:51 ` [PATCH v5 15/22] powerpc/mm: Avoid useless lock with single page fragments Christophe Leroy
2018-09-26 2:43 ` Aneesh Kumar K.V
2018-09-25 16:51 ` [PATCH v5 16/22] powerpc/mm: move platform specific mmu-xxx.h in platform directories Christophe Leroy
2018-09-26 2:44 ` Aneesh Kumar K.V
2018-09-25 16:51 ` [PATCH v5 17/22] powerpc/mm: Move pgtable_t into platform headers Christophe Leroy
2018-09-26 2:44 ` Aneesh Kumar K.V
2018-09-25 16:51 ` [PATCH v5 18/22] powerpc/mm: Extend pte_fragment functionality to nohash/32 Christophe Leroy
2018-09-26 2:48 ` Aneesh Kumar K.V
2018-09-26 8:10 ` Christophe LEROY
2018-09-26 9:01 ` Aneesh Kumar K.V
2018-09-25 16:51 ` [PATCH v5 19/22] powerpc/8xx: Remove PTE_ATOMIC_UPDATES Christophe Leroy
2018-09-25 16:51 ` [PATCH v5 20/22] powerpc/mm: reintroduce 16K pages with HW assistance on 8xx Christophe Leroy
2018-09-25 16:51 ` [PATCH v5 21/22] powerpc/nohash32: allow setting GUARDED attribute in the PMD directly Christophe Leroy
2018-10-17 11:51 ` Christophe LEROY
2018-09-25 16:51 ` [PATCH v5 22/22] powerpc/8xx: set " Christophe Leroy
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