From: Christophe Leroy <christophe.leroy@c-s.fr>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
Michael Ellerman <mpe@ellerman.id.au>,
npiggin@gmail.com, dja@axtens.net
Cc: linux-mm@kvack.org, linuxppc-dev@lists.ozlabs.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v3 03/15] powerpc/32: save DEAR/DAR before calling handle_page_fault
Date: Tue, 10 Sep 2019 09:16:22 +0000 (UTC) [thread overview]
Message-ID: <c3c2b4de8794815d35d88c679f22a49fd8a9e0b7.1568106758.git.christophe.leroy@c-s.fr> (raw)
In-Reply-To: <cover.1568106758.git.christophe.leroy@c-s.fr>
handle_page_fault() is the only function that save DAR/DEAR itself.
Save DAR/DEAR before calling handle_page_fault() to prepare for
VMAP stack which will require to save even before.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/kernel/entry_32.S | 1 -
arch/powerpc/kernel/head_32.S | 2 ++
arch/powerpc/kernel/head_40x.S | 2 ++
arch/powerpc/kernel/head_8xx.S | 2 ++
arch/powerpc/kernel/head_booke.h | 2 ++
arch/powerpc/kernel/head_fsl_booke.S | 1 +
6 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 6273b4862482..317ad9df8ba8 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -621,7 +621,6 @@ ppc_swapcontext:
*/
.globl handle_page_fault
handle_page_fault:
- stw r4,_DAR(r1)
addi r3,r1,STACK_FRAME_OVERHEAD
#ifdef CONFIG_PPC_BOOK3S_32
andis. r0,r5,DSISR_DABRMATCH@h
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 9e868567b716..bebb49d877f2 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -310,6 +310,7 @@ BEGIN_MMU_FTR_SECTION
END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
1: lwz r5,_DSISR(r11) /* get DSISR value */
mfspr r4,SPRN_DAR
+ stw r4, _DAR(r11)
EXC_XFER_LITE(0x300, handle_page_fault)
@@ -327,6 +328,7 @@ BEGIN_MMU_FTR_SECTION
END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
1: mr r4,r12
andis. r5,r9,DSISR_SRR1_MATCH_32S@h /* Filter relevant SRR1 bits */
+ stw r4, _DAR(r11)
EXC_XFER_LITE(0x400, handle_page_fault)
/* External interrupt */
diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S
index 585ea1976550..9bb663977e84 100644
--- a/arch/powerpc/kernel/head_40x.S
+++ b/arch/powerpc/kernel/head_40x.S
@@ -313,6 +313,7 @@ _ENTRY(saved_ksp_limit)
START_EXCEPTION(0x0400, InstructionAccess)
EXCEPTION_PROLOG
mr r4,r12 /* Pass SRR0 as arg2 */
+ stw r4, _DEAR(r11)
li r5,0 /* Pass zero as arg3 */
EXC_XFER_LITE(0x400, handle_page_fault)
@@ -676,6 +677,7 @@ DataAccess:
mfspr r5,SPRN_ESR /* Grab the ESR, save it, pass arg3 */
stw r5,_ESR(r11)
mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */
+ stw r4, _DEAR(r11)
EXC_XFER_LITE(0x300, handle_page_fault)
/* Other PowerPC processors, namely those derived from the 6xx-series
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index dac7c0a34eea..fb284d95c76a 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -486,6 +486,7 @@ InstructionTLBError:
tlbie r4
/* 0x400 is InstructionAccess exception, needed by bad_page_fault() */
.Litlbie:
+ stw r4, _DAR(r11)
EXC_XFER_LITE(0x400, handle_page_fault)
/* This is the data TLB error on the MPC8xx. This could be due to
@@ -504,6 +505,7 @@ DARFixed:/* Return from dcbx instruction bug workaround */
mfspr r5,SPRN_DSISR
stw r5,_DSISR(r11)
mfspr r4,SPRN_DAR
+ stw r4, _DAR(r11)
andis. r10,r5,DSISR_NOHPTE@h
beq+ .Ldtlbie
tlbie r4
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
index 2ae635df9026..37fc84ed90e3 100644
--- a/arch/powerpc/kernel/head_booke.h
+++ b/arch/powerpc/kernel/head_booke.h
@@ -467,6 +467,7 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
mfspr r5,SPRN_ESR; /* Grab the ESR and save it */ \
stw r5,_ESR(r11); \
mfspr r4,SPRN_DEAR; /* Grab the DEAR */ \
+ stw r4, _DEAR(r11); \
EXC_XFER_LITE(0x0300, handle_page_fault)
#define INSTRUCTION_STORAGE_EXCEPTION \
@@ -475,6 +476,7 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
mfspr r5,SPRN_ESR; /* Grab the ESR and save it */ \
stw r5,_ESR(r11); \
mr r4,r12; /* Pass SRR0 as arg2 */ \
+ stw r4, _DEAR(r11); \
li r5,0; /* Pass zero as arg3 */ \
EXC_XFER_LITE(0x0400, handle_page_fault)
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index adf0505dbe02..442aaac292b0 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -376,6 +376,7 @@ interrupt_base:
mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */
andis. r10,r5,(ESR_ILK|ESR_DLK)@h
bne 1f
+ stw r4, _DEAR(r11)
EXC_XFER_LITE(0x0300, handle_page_fault)
1:
addi r3,r1,STACK_FRAME_OVERHEAD
--
2.13.3
next prev parent reply other threads:[~2019-09-10 9:28 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-10 9:16 [PATCH v3 00/15] Enable CONFIG_VMAP_STACK on PPC32 Christophe Leroy
2019-09-10 9:16 ` [PATCH v3 01/15] powerpc/32: replace MTMSRD() by mtmsr Christophe Leroy
2019-09-10 9:16 ` [PATCH v3 02/15] powerpc/32: Add EXCEPTION_PROLOG_0 in head_32.h Christophe Leroy
2019-09-10 9:16 ` Christophe Leroy [this message]
2019-09-10 9:16 ` [PATCH v3 04/15] powerpc/32: move MSR_PR test into EXCEPTION_PROLOG_0 Christophe Leroy
2019-09-10 9:16 ` [PATCH v3 05/15] powerpc/32: add a macro to get and/or save DAR and DSISR on stack Christophe Leroy
2019-09-10 9:16 ` [PATCH v3 06/15] powerpc/32: prepare for CONFIG_VMAP_STACK Christophe Leroy
2019-10-17 7:36 ` Andrew Donnellan
2019-10-18 6:46 ` Christophe Leroy
2019-10-18 7:09 ` Andrew Donnellan
2019-09-10 9:16 ` [PATCH v3 07/15] powerpc: align stack to 2 * THREAD_SIZE with VMAP_STACK Christophe Leroy
2019-09-10 9:16 ` [PATCH v3 08/15] powerpc/32: Add early stack overflow detection with VMAP stack Christophe Leroy
2019-09-10 9:16 ` [PATCH v3 09/15] powerpc/8xx: Use alternative scratch registers in DTLB miss handler Christophe Leroy
2019-09-10 9:16 ` [PATCH v3 10/15] powerpc/8xx: drop exception entries for non-existing exceptions Christophe Leroy
2019-09-10 9:16 ` [PATCH v3 11/15] powerpc/8xx: move DataStoreTLBMiss perf handler Christophe Leroy
2019-09-10 9:16 ` [PATCH v3 12/15] powerpc/8xx: split breakpoint exception Christophe Leroy
2019-09-10 9:16 ` [PATCH v3 13/15] powerpc/8xx: Enable CONFIG_VMAP_STACK Christophe Leroy
2019-09-10 9:16 ` [PATCH v3 14/15] powerpc/32s: reorganise DSI handler Christophe Leroy
2019-09-10 9:16 ` [PATCH v3 15/15] powerpc/32s: Activate CONFIG_VMAP_STACK Christophe Leroy
2019-11-18 11:11 ` Michael Ellerman
2019-11-19 6:57 ` Michael Ellerman
2019-11-19 17:23 ` Christophe Leroy
2019-11-19 6:58 ` Michael Ellerman
2019-11-20 7:38 ` Christophe Leroy
2019-11-26 9:01 ` Christophe Leroy
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=c3c2b4de8794815d35d88c679f22a49fd8a9e0b7.1568106758.git.christophe.leroy@c-s.fr \
--to=christophe.leroy@c-s.fr \
--cc=benh@kernel.crashing.org \
--cc=dja@axtens.net \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mm@kvack.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=mpe@ellerman.id.au \
--cc=npiggin@gmail.com \
--cc=paulus@samba.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).