From: Paolo Bonzini <pbonzini@redhat.com>
To: "Luck, Tony" <tony.luck@intel.com>, Jim Mattson <jmattson@google.com>
Cc: Qian Cai <cai@redhat.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-tip-commits@vger.kernel.org"
<linux-tip-commits@vger.kernel.org>, Boris Petkov <bp@alien8.de>,
Borislav Petkov <bp@suse.de>, x86 <x86@kernel.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>
Subject: Re: [tip: ras/core] x86/mce: Enable additional error logging on certain Intel CPUs
Date: Tue, 10 Nov 2020 10:10:03 +0100 [thread overview]
Message-ID: <03cfc157-efac-ac4a-2924-d455f29e6ecd@redhat.com> (raw)
In-Reply-To: <bece344ae6944368bf5a9a60e9145bd4@intel.com>
> Maybe no contract ... but a bunch of places (many of them in Intel
> specific code) that check for it
Interestingly, quite a few of them are actually checking for HYPERVISOR
not because of missing hypervisor features, but rather because
hypervisors don't have to work around certain errata. :)
Full analysis after my sig, but tl;dr: the only case of using HYPERVISOR
before using MSRs are in arch/x86/events/intel/cstate.c and
arch/x86/events/intel/uncore.c. There are some workarounds in
drivers/gpu that might fall into a similar bucket. But as far as MSRs
go, the way to go overwhelmingly seems to be {rd,wr}msrl_safe.
Thanks,
Paolo
On 10/11/20 00:36, Luck, Tony wrote:
> arch/x86/events/core.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) {
Print a slightly less frightening warning.
> arch/x86/events/intel/core.c: if (!boot_cpu_has(X86_FEATURE_HYPERVISOR))
Working around KVM's ignore_msrs=1 option (and quite ugly; shows that
the option shouldn't be enabled by default).
> arch/x86/events/intel/core.c: int assume = 3 * !boot_cpu_has(X86_FEATURE_HYPERVISOR);
Seems unnecessary.
> arch/x86/events/intel/cstate.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
> arch/x86/events/intel/uncore.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
Too complicated. :)
> arch/x86/kernel/apic/apic.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
Hypervisors don't have errata.
> arch/x86/kernel/cpu/bugs.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
> arch/x86/kernel/cpu/bugs.c: else if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
> arch/x86/kernel/cpu/bugs.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) {
> arch/x86/kernel/cpu/bugs.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) {
> arch/x86/kernel/cpu/intel.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
Print different vulnerability status in sysfs.
> arch/x86/kernel/cpu/mshyperv.c: if (!boot_cpu_has(X86_FEATURE_HYPERVISOR))
> arch/x86/kernel/cpu/vmware.c: * If !boot_cpu_has(X86_FEATURE_HYPERVISOR), vmware_hypercall_mode
> arch/x86/kernel/cpu/vmware.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) {
> arch/x86/kernel/jailhouse.c: !boot_cpu_has(X86_FEATURE_HYPERVISOR))
> arch/x86/kernel/kvm.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
> arch/x86/kernel/paravirt.c: if (!boot_cpu_has(X86_FEATURE_HYPERVISOR))
Obviously needed before using paravirt features of the hypervisor.
> arch/x86/kernel/tsc.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR) ||
Disables ART in VMs. Probably the idea is that ART does not have an
offset field similar to the TSC's, but it's not necessary. Looking at
the hypervisor-provided CPUID should be enough.
> arch/x86/mm/init_64.c: if (!boot_cpu_has(X86_FEATURE_HYPERVISOR)) {
Tweaks hotplug heuristics, no MSRs involved.
> drivers/acpi/processor_idle.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
Avoids pointless hypervisor exit on idle (i.e. just an optimization).
> drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h: return boot_cpu_has(X86_FEATURE_HYPERVISOR);
Work around SR-IOV bugs.
> drivers/gpu/drm/i915/i915_memcpy.c: !boot_cpu_has(X86_FEATURE_HYPERVISOR))
Work around KVM deficiency.
> drivers/gpu/drm/radeon/radeon_device.c: return boot_cpu_has(X86_FEATURE_HYPERVISOR);
Work around SR-IOV bugs.
> drivers/visorbus/visorchipset.c: if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) {
Needed before using paravirt features of the hypervisor.
prev parent reply other threads:[~2020-11-10 9:10 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <fcb21490-84a1-8b99-b494-3a6ac2a0e16a@skynet.be>
[not found] ` <20201029100655.GA31903@zn.tnic>
[not found] ` <20201029151518.GA23990@agluck-desk2.amr.corp.intel.com>
[not found] ` <20201029194118.GC31903@zn.tnic>
[not found] ` <87ft5wo8zn.fsf@nanos.tec.linutronix.de>
[not found] ` <20201030091056.GA6532@zn.tnic>
[not found] ` <20201030190400.GA13797@agluck-desk2.amr.corp.intel.com>
2020-10-30 19:08 ` [PATCH] x86/mce: Enable additional error logging on certain Intel CPUs Luck, Tony
2020-11-02 11:12 ` Borislav Petkov
2020-11-02 11:18 ` [tip: ras/core] " tip-bot2 for Tony Luck
2020-11-09 21:55 ` Qian Cai
2020-11-09 22:09 ` Luck, Tony
2020-11-09 22:36 ` Jim Mattson
2020-11-09 22:57 ` Luck, Tony
2020-11-09 23:24 ` [PATCH] x86/mce: Check for hypervisor before enabling additional error logging Luck, Tony
2020-11-10 6:31 ` Borislav Petkov
2020-11-10 8:50 ` Paolo Bonzini
2020-11-10 9:56 ` Borislav Petkov
2020-11-10 10:40 ` Paolo Bonzini
2020-11-10 15:50 ` Borislav Petkov
2020-11-10 16:08 ` Paolo Bonzini
2020-11-10 17:52 ` Luck, Tony
2020-11-10 20:37 ` Paolo Bonzini
2020-11-11 0:39 ` [PATCH v2] x86/mce: Use "safe" MSR functions when " Luck, Tony
2020-11-16 16:44 ` [tip: ras/core] " tip-bot2 for Tony Luck
2020-11-09 23:26 ` [tip: ras/core] x86/mce: Enable additional error logging on certain Intel CPUs Jim Mattson
2020-11-09 23:36 ` Luck, Tony
2020-11-10 9:10 ` Paolo Bonzini [this message]
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