From: Dave Hansen <dave.hansen@intel.com>
To: Thomas Gleixner <tglx@linutronix.de>,
LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Andrew Cooper <andrew.cooper3@citrix.com>,
"Edgecombe, Rick P" <rick.p.edgecombe@intel.com>
Subject: Re: [patch 1/3] x86/fpu/xsave: Support XSAVEC in the kernel
Date: Thu, 14 Apr 2022 07:43:51 -0700 [thread overview]
Message-ID: <05d59fea-f6f6-6d1a-cc0e-c032202ecc18@intel.com> (raw)
In-Reply-To: <20220404104820.598704095@linutronix.de>
On 4/4/22 05:11, Thomas Gleixner wrote:
> - Create a software defined X86_FEATURE_XCOMPACTED to select the compacted
> XSTATE buffer format for both XSAVEC and XSAVES.
We probably should have logically separated the compacted format bits
from the supervisor bits long ago. I'm glad this is doing it now.
next prev parent reply other threads:[~2022-04-14 15:45 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-04 12:11 [patch 0/3] x86/fpu/xsave: Add XSAVEC support and XGETBV1 utilization Thomas Gleixner
2022-04-04 12:11 ` [patch 1/3] x86/fpu/xsave: Support XSAVEC in the kernel Thomas Gleixner
2022-04-04 16:10 ` Andrew Cooper
2022-04-14 14:43 ` Dave Hansen [this message]
2022-04-25 13:11 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2022-04-04 12:11 ` [patch 2/3] x86/fpu/xsave: Prepare for optimized compaction Thomas Gleixner
2022-04-14 15:46 ` Dave Hansen
2022-04-19 12:39 ` Thomas Gleixner
2022-04-19 13:33 ` Thomas Gleixner
2022-04-04 12:11 ` [patch 3/3] x86/fpu/xsave: Optimize XSAVEC/S when XGETBV1 is supported Thomas Gleixner
2022-04-14 17:24 ` Dave Hansen
2022-04-19 13:43 ` Thomas Gleixner
2022-04-19 21:22 ` Thomas Gleixner
2022-04-20 18:15 ` Tom Lendacky
2022-04-22 19:30 ` Thomas Gleixner
2022-04-23 15:20 ` Dave Hansen
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