From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934913AbcKJQIp (ORCPT ); Thu, 10 Nov 2016 11:08:45 -0500 Received: from mout.kundenserver.de ([212.227.126.133]:63938 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934876AbcKJQIj (ORCPT ); Thu, 10 Nov 2016 11:08:39 -0500 From: Arnd Bergmann To: Gabriele Paoloni Cc: "linux-arm-kernel@lists.infradead.org" , Yuanzhichang , "mark.rutland@arm.com" , "devicetree@vger.kernel.org" , "lorenzo.pieralisi@arm.com" , "minyard@acm.org" , "linux-pci@vger.kernel.org" , "benh@kernel.crashing.org" , John Garry , "will.deacon@arm.com" , "linux-kernel@vger.kernel.org" , "xuwei (O)" , Linuxarm , "zourongrong@gmail.com" , "robh+dt@kernel.org" , "kantyzc@163.com" , "linux-serial@vger.kernel.org" , "catalin.marinas@arm.com" , "olof@lixom.net" , "liviu.dudau@arm.com" , "bhelgaas@google.com" , "zhichang.yuan02@gmail.com" Subject: Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on Hip06 Date: Thu, 10 Nov 2016 17:07:21 +0100 Message-ID: <10334260.ztLXZ2Oynd@wuerfel> User-Agent: KMail/5.1.3 (Linux/4.4.0-34-generic; KDE/5.18.0; x86_64; ; ) In-Reply-To: References: <1478576829-112707-1-git-send-email-yuanzhichang@hisilicon.com> <17821285.aIcTyCGn5n@wuerfel> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:Isvn+T1KrMWppSD6L+MyNz4feX9KnbYFVY1kpEVUe3Vy0AsKXrZ 1dQDL4VVUg0Gua5b2EhDHFpAQUR2i55ZSQJ6FOXxRvKWAj4uE4x1BB5mWdtVnVKBm1oZ0EL ed4/29L/4d1GZJaxr6KcM54pXQgAdPn03FQyvdksp0GRlD2/IPlX25GZdr8wXcNQ5Z+/ulQ yxR4CkGqGWKA8qGdeXqUQ== X-UI-Out-Filterresults: notjunk:1;V01:K0:FRKgPPtGCoo=:s2x5oX32H5Zk52c5JTLO3/ hGmiIzuZx8FfUwTb4vLhUz51BS7V+VI93KVnFSj+CQ31/VynqMz9GkNkR0MnrlMEEmiJSNiol VroeWktA33+QPQUrtBCYduHNjFhyc9CGI3qZ0vFwLg6fXqGydWSb5bVSMF4f204ahMX4z+pFZ xSFTmuTL7vgxJcPu6fKEQxAj1TtVxSMVLclNDc1jNpOXIsKwavrJ426UzwB6H10c2Y07JiIQt AAVklZR6OvySzAFujEbZYuWeJkl5q2I/S7Uel1TIM+It6C6nAQxygFMvZ385RZNhKev3QeWh4 mbClqIlBHOk9mUwz7X/Mi2LIxKiltDUKtrEo24Dk+tTYs1vLKB0XhmJUmY/TYiUetC8ziF2u6 M7v+TBQsOmT3pmJIJoEUc9b7hz6KhchcwIsd0C0K4BOZRwqbDIgrW8W6glEjUYhuQdAvgyuYJ b/f0iXrpjP4OZ1shcJOiwL+s9Mz5NBcXOCPCmLPhj0G3QOQnWovAYvZC72OdgMtEeCFNKe+XE 5IjUx1WghSraN7WDjVFSZnh91wF5hoWp9iXgH+aZ234aGQiKHzZp5nHZLQFcI4CJuIZVoTO0U igO5bMQWssdANZeg1HPRuqr5Q0h2WII1sQ9v9cOpvoIiQacRxnU17hjb31zc/G1wW9G1sT+E5 TdagupyFV/cYccE6ohbedFHhBY+rEPTexIlJ26rCZTXZmeA== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thursday, November 10, 2016 3:36:49 PM CET Gabriele Paoloni wrote: > > Where should we get the range from? For LPC we know that it is going > Work on anything that is not used by PCI I/O space, and this is > why we use [0, PCIBIOS_MIN_IO] It should be allocated the same way we allocate PCI config space segments. This is currently done with the io_range list in drivers/pci/pci.c, which isn't perfect but could be extended if necessary. Based on what others commented here, I'd rather make the differences between ISA/LPC and PCI I/O ranges smaller than larger. > > Your current version has > > > > if (arm64_extio_ops->pfout) \ > > arm64_extio_ops->pfout(arm64_extio_ops->devpara,\ > > addr, value, sizeof(type)); \ > > > > Instead, just subtract the start of the range from the logical > > port number to transform it back into a bus-local port number: > > These accessors do not operate on IO tokens: > > If (arm64_extio_ops->start > addr || arm64_extio_ops->end < addr) > addr is not going to be an I/O token; in fact patch 2/3 imposes that > the I/O tokens will start at PCIBIOS_MIN_IO. So from 0 to PCIBIOS_MIN_IO > we have free physical addresses that the accessors can operate on. Ah, I missed that part. I'd rather not use PCIBIOS_MIN_IO to refer to the logical I/O tokens, the purpose of that macro is really meant for allocating PCI I/O port numbers within the address space of one bus. Note that it's equally likely that whichever next platform needs non-mapped I/O access like this actually needs them for PCI I/O space, and that will use it on addresses registered to a PCI host bridge. If we separate the two steps: a) assign a range of logical I/O port numbers to a bus b) register a set of helpers for redirecting logical I/O port to a helper function then I think the code will get cleaner and more flexible. It should actually then be able to replace the powerpc specific implementation. Arnd