From: Yakir Yang <ykk@rock-chips.com>
To: David Airlie <airlied@linux.ie>,
Russell King <rmk+kernel@arm.linux.org.uk>,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>,
Shawn Guo <shawn.guo@linaro.org>, Rob Clark <robdclark@gmail.com>,
Mark Yao <mark.yao@rock-chips.com>,
Daniel Vetter <daniel@ffwll.ch>,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
Arnd Bergmann <arnd@arndb.de>, Sean Cross <xobs@kosagi.com>,
Jyri Sarha <jsarha@ti.com>, Ben Zhang <benzh@chromium.org>,
alsa-devel@alsa-project.org, Heiko Stuebner <heiko@sntech.de>,
linux-arm-kernel@lists.infradead.org,
Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
devicetree@vger.kernel.org, djkurtz@chromium.org,
mmind00@googlemail.com, dianders@chromium.org,
marcheu@chromium.org, linux-rockchip@lists.infradead.org,
Yakir Yang <ykk@rock-chips.com>
Subject: [PATCH v3 10/15] drm: bridge/dw_hdmi: add audio sample channel status setting
Date: Tue, 3 Feb 2015 10:16:03 -0500 [thread overview]
Message-ID: <1422976563-30353-1-git-send-email-ykk@rock-chips.com> (raw)
In-Reply-To: <1422975418-13302-1-git-send-email-ykk@rock-chips.com>
When transmitting IEC60985 linear PCM audio, we configure the
Aduio Sample Channel Status information of all the channel
status bits in the IEC60958 frame.
(am from https://patchwork.kernel.org/patch/5749101/)
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Changes in v3:
- Determine whether sample channel should set by desig_id.
Changes in v2:
- Add audio sample channel status setting
drivers/gpu/drm/bridge/dw_hdmi.c | 44 ++++++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/bridge/dw_hdmi.h | 20 ++++++++++++++++++
2 files changed, 64 insertions(+)
diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c b/drivers/gpu/drm/bridge/dw_hdmi.c
index 0bee5ea..44e95f3 100644
--- a/drivers/gpu/drm/bridge/dw_hdmi.c
+++ b/drivers/gpu/drm/bridge/dw_hdmi.c
@@ -196,6 +196,47 @@ static void hdmi_mask_writeb(struct dw_hdmi *hdmi, u8 data, unsigned int reg,
hdmi_modb(hdmi, data << shift, mask, reg);
}
+static void hdmi_set_schnl(struct dw_hdmi *hdmi)
+{
+ u8 aud_schnl_samplerate;
+
+ switch (hdmi->sample_rate) {
+ case 32000:
+ aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_32K;
+ break;
+ case 44100:
+ aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_44K1;
+ break;
+ case 48000:
+ aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_48K;
+ break;
+ case 88200:
+ aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_88K2;
+ break;
+ case 96000:
+ aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_96K;
+ break;
+ case 176400:
+ aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_176K4;
+ break;
+ case 192000:
+ aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_192K;
+ break;
+ case 768000:
+ aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_768K;
+ break;
+ default:
+ aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_44K1;
+ break;
+ }
+
+ /* set channel status register */
+ hdmi_modb(hdmi, aud_schnl_samplerate,
+ HDMI_FC_AUDSCHNLS7_SMPRATE_MASK, HDMI_FC_AUDSCHNLS7);
+ hdmi_writeb(hdmi, ((~aud_schnl_samplerate) << 4) | 0x2,
+ HDMI_FC_AUDSCHNLS8);
+}
+
static void hdmi_set_clock_regenerator(struct dw_hdmi *hdmi,
unsigned int n, unsigned int cts)
{
@@ -439,6 +480,9 @@ static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi,
pixel_clk, clk_n, clk_cts);
hdmi_set_clock_regenerator(hdmi, clk_n, clk_cts);
+
+ if (hdmi->id.design == 0x20)
+ hdmi_set_schnl(hdmi);
}
static void hdmi_init_clk_regenerator(struct dw_hdmi *hdmi)
diff --git a/drivers/gpu/drm/bridge/dw_hdmi.h b/drivers/gpu/drm/bridge/dw_hdmi.h
index 29e4bee..c2d210f 100644
--- a/drivers/gpu/drm/bridge/dw_hdmi.h
+++ b/drivers/gpu/drm/bridge/dw_hdmi.h
@@ -162,6 +162,17 @@
#define HDMI_FC_SPDDEVICEINF 0x1062
#define HDMI_FC_AUDSCONF 0x1063
#define HDMI_FC_AUDSSTAT 0x1064
+#define HDMI_FC_AUDSV 0x1065
+#define HDMI_FC_AUDSU 0x1066
+#define HDMI_FC_AUDSCHNLS0 0x1067
+#define HDMI_FC_AUDSCHNLS1 0x1068
+#define HDMI_FC_AUDSCHNLS2 0x1069
+#define HDMI_FC_AUDSCHNLS3 0x106a
+#define HDMI_FC_AUDSCHNLS4 0x106b
+#define HDMI_FC_AUDSCHNLS5 0x106c
+#define HDMI_FC_AUDSCHNLS6 0x106d
+#define HDMI_FC_AUDSCHNLS7 0x106e
+#define HDMI_FC_AUDSCHNLS8 0x106f
#define HDMI_FC_DATACH0FILL 0x1070
#define HDMI_FC_DATACH1FILL 0x1071
#define HDMI_FC_DATACH2FILL 0x1072
@@ -754,6 +765,15 @@ enum {
/* HDMI_FC_AUDSCHNLS7 field values */
HDMI_FC_AUDSCHNLS7_ACCURACY_OFFSET = 4,
HDMI_FC_AUDSCHNLS7_ACCURACY_MASK = 0x30,
+ HDMI_FC_AUDSCHNLS7_SMPRATE_MASK = 0x0f,
+ HDMI_FC_AUDSCHNLS7_SMPRATE_192K = 0xe,
+ HDMI_FC_AUDSCHNLS7_SMPRATE_176K4 = 0xc,
+ HDMI_FC_AUDSCHNLS7_SMPRATE_96K = 0xa,
+ HDMI_FC_AUDSCHNLS7_SMPRATE_768K = 0x9,
+ HDMI_FC_AUDSCHNLS7_SMPRATE_88K2 = 0x8,
+ HDMI_FC_AUDSCHNLS7_SMPRATE_32K = 0x3,
+ HDMI_FC_AUDSCHNLS7_SMPRATE_48K = 0x2,
+ HDMI_FC_AUDSCHNLS7_SMPRATE_44K1 = 0x0,
/* HDMI_FC_AUDSCHNLS8 field values */
HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_MASK = 0xf0,
--
2.1.2
next prev parent reply other threads:[~2015-02-03 15:17 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-03 14:56 [PATCH v3 0/15] Those patches is used for dw_hdmi audio support Yakir Yang
2015-02-03 15:01 ` [PATCH v3 01/15] drm: bridge/dw_hdmi: add irq control to suspend/resume Yakir Yang
2015-02-03 15:02 ` [PATCH v3 02/15] drm: bridge/dw_hdmi: wrap irq control in fucntions Yakir Yang
2015-02-03 15:08 ` [PATCH v3 03/15] drm: rockchip/dw_hdmi_rockchip: add resume/suspend support Yakir Yang
2015-02-03 15:11 ` [PATCH v3 04/15] drm: bridge/dw_hdmi: add indentification registers parse and record Yakir Yang
2015-02-05 15:46 ` Daniel Kurtz
2015-02-07 3:33 ` yakir
2015-02-03 15:12 ` [PATCH v3 05/15] drm: bridge/dw_hdmi: combine hdmi_set_clock_regenerator_n() and hdmi_regenerate_cts() Yakir Yang
2015-02-05 15:54 ` Daniel Kurtz
2015-02-07 3:33 ` yakir
2015-02-03 15:13 ` [PATCH v3 06/15] drm: bridge/dw_hdmi: adjust n/cts setting order Yakir Yang
2015-02-03 15:13 ` [PATCH v3 07/15] drm: bridge/dw_hdmi: set ncts_atomic_write & cts_manual Yakir Yang
2015-02-03 15:14 ` [PATCH v3 08/15] drm: bridge/dw_hdmi: add audio support for more display resolutions Yakir Yang
2015-02-03 15:15 ` [PATCH v3 09/15] drm: bridge/dw_hdmi: enable audio support for No-CEA " Yakir Yang
2015-02-03 15:16 ` Yakir Yang [this message]
2015-02-03 15:16 ` [PATCH v3 11/15] drm: bridge/dw_hdmi: add audio clock control interfaces Yakir Yang
2015-02-03 15:17 ` [PATCH v3 12/15] drm: bridge/dw_hdmi: creat dw-hdmi-audio platform device Yakir Yang
2015-02-03 15:18 ` [PATCH v3 13/15] ASoC: dw-hdmi-audio: add codec driver for dw hdmi audio Yakir Yang
2015-02-03 15:19 ` [PATCH v3 14/15] ASoC: rockchip-hdmi-audio: add sound driver for " Yakir Yang
2015-02-03 15:19 ` [PATCH v3 15/15] dt-bindings: Add documentation for Rockchip dw-hdmi-audio Yakir Yang
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