From: David Carrillo-Cisneros <davidcc@google.com>
To: linux-kernel@vger.kernel.org
Cc: "x86@kernel.org" <x86@kernel.org>, Ingo Molnar <mingo@redhat.com>,
"Yan, Zheng" <zheng.z.yan@intel.com>,
Andi Kleen <ak@linux.intel.com>, Kan Liang <kan.liang@intel.com>,
Peter Zijlstra <peterz@infradead.org>,
David Carrillo-Cisneros <davidcc@google.com>,
Stephane Eranian <eranian@google.com>
Subject: [PATCH 0/3] fix MSR_LAST_BRANCH_FROM Haswell support
Date: Wed, 1 Jun 2016 19:42:00 -0700 [thread overview]
Message-ID: <1464835323-33872-1-git-send-email-davidcc@google.com> (raw)
The patch:
perf/x86/intel: Protect LBR and extra_regs against KVM lying
introduced an extra test for LBR support but did not move the dmesg
accordingly. This problem is fixed in first patch in this series.
When a machine that used LBR is rebooted using kexec, the extra test
for LBR support may fail due to a hw bug/quirk in Haswell that generate
a #GPF when restoring the value of MSR_LAST_BRANCH_FROM_* msrs with
sign-extended valuse (e.p. kernel addresses).
During normal execution, this problem is masked by a work-around to
another hw bug that prevented FREEZE_LBRS_ON_PMI from be used in kernel
branches, introduced in
"perf/x86/intel: Add Haswell LBR call stack support".
The second patch in this series contains a workaround for the
MSR_LAST_BRANCH_FROM_* hw bug/quirk.
The last patch is not to be commited, but to test the second patch. It
removes the effect of the FREEZE_LBRS_ON_PMI work-around by allowing
LBR call-stack for kernel addresses.
This series is rebased at torvalds/linux/master .
David Carrillo-Cisneros (3):
perf/x86/intel: output LBR support statement after validation
perf/x86/intel: fix for MSR_LAST_BRANCH_FROM_x quirk when no TSX
perf, perf/tool: trigger lbr_from signext bug
arch/x86/events/intel/core.c | 20 +++++++++++
arch/x86/events/intel/lbr.c | 83 +++++++++++++++++++++++++++++++++++++-------
arch/x86/events/perf_event.h | 2 ++
tools/perf/util/evsel.c | 17 +++++++--
4 files changed, 106 insertions(+), 16 deletions(-)
--
2.8.0.rc3.226.g39d4020
next reply other threads:[~2016-06-02 2:42 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-02 2:42 David Carrillo-Cisneros [this message]
2016-06-02 2:42 ` [PATCH 1/3] perf/x86/intel: output LBR support statement after validation David Carrillo-Cisneros
2016-06-02 8:21 ` Peter Zijlstra
2016-06-02 16:04 ` Andi Kleen
2016-06-02 17:28 ` Stephane Eranian
2016-06-06 1:59 ` Andi Kleen
2016-06-08 7:27 ` Stephane Eranian
2016-06-08 9:08 ` Andi Kleen
2016-06-02 2:42 ` [PATCH 2/3] perf/x86/intel: fix for MSR_LAST_BRANCH_FROM_x quirk when no TSX David Carrillo-Cisneros
2016-06-02 8:23 ` Peter Zijlstra
2016-06-02 8:37 ` Peter Zijlstra
2016-06-02 8:53 ` Peter Zijlstra
[not found] ` <CALcN6mhMsNHgRVuYmYsE+O+Neq6PcaDy1-ARzBd=Vej=0rHr0Q@mail.gmail.com>
2016-06-03 9:21 ` Peter Zijlstra
2016-06-02 8:54 ` Peter Zijlstra
2016-06-02 8:55 ` Peter Zijlstra
2016-06-02 16:07 ` Andi Kleen
2016-06-02 2:42 ` [PATCH 3/3] perf, perf/tool: trigger lbr_from signext bug David Carrillo-Cisneros
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